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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=+movrs,+avx10.2 -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK3 4define <2 x i64> @test_mm_movrsb_epu8(ptr %__A) {5; CHECK-LABEL: test_mm_movrsb_epu8:6; CHECK: # %bb.0: # %entry7; CHECK-NEXT: vmovrsb (%rdi), %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x6f,0x07]8; CHECK-NEXT: retq # encoding: [0xc3]9entry:10 %0 = tail call <16 x i8> @llvm.x86.avx10.vmovrsb128(ptr %__A)11 %1 = bitcast <16 x i8> %0 to <2 x i64>12 ret <2 x i64> %113}14 15define <2 x i64> @test_mm_mask_movrsb_epu8(<2 x i64> %__A, i16 zeroext %__B, ptr %__C) {16; CHECK-LABEL: test_mm_mask_movrsb_epu8:17; CHECK: # %bb.0: # %entry18; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]19; CHECK-NEXT: vmovrsb (%rsi), %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6f,0x06]20; CHECK-NEXT: retq # encoding: [0xc3]21entry:22 %0 = tail call <16 x i8> @llvm.x86.avx10.vmovrsb128(ptr %__C)23 %1 = bitcast <2 x i64> %__A to <16 x i8>24 %2 = bitcast i16 %__B to <16 x i1>25 %3 = select <16 x i1> %2, <16 x i8> %0, <16 x i8> %126 %4 = bitcast <16 x i8> %3 to <2 x i64>27 ret <2 x i64> %428}29 30define <2 x i64> @test_mm_maskz_movrsb_epu8(i16 zeroext %__A, ptr %__B) {31; CHECK-LABEL: test_mm_maskz_movrsb_epu8:32; CHECK: # %bb.0: # %entry33; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]34; CHECK-NEXT: vmovrsb (%rsi), %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6f,0x06]35; CHECK-NEXT: retq # encoding: [0xc3]36entry:37 %0 = tail call <16 x i8> @llvm.x86.avx10.vmovrsb128(ptr %__B )38 %1 = bitcast i16 %__A to <16 x i1>39 %2 = select <16 x i1> %1, <16 x i8> %0, <16 x i8> zeroinitializer40 %3 = bitcast <16 x i8> %2 to <2 x i64>41 ret <2 x i64> %342}43 44define <4 x i64> @test_mm256_movrsb_epu8(ptr %__A) {45; CHECK-LABEL: test_mm256_movrsb_epu8:46; CHECK: # %bb.0: # %entry47; CHECK-NEXT: vmovrsb (%rdi), %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x6f,0x07]48; CHECK-NEXT: retq # encoding: [0xc3]49entry:50 %0 = tail call <32 x i8> @llvm.x86.avx10.vmovrsb256(ptr %__A)51 %1 = bitcast <32 x i8> %0 to <4 x i64>52 ret <4 x i64> %153}54 55define <4 x i64> @test_mm256_mask_movrsb_epu8(<4 x i64> %__A, i32 %__B, ptr %__C) {56; CHECK-LABEL: test_mm256_mask_movrsb_epu8:57; CHECK: # %bb.0: # %entry58; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]59; CHECK-NEXT: vmovrsb (%rsi), %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6f,0x06]60; CHECK-NEXT: retq # encoding: [0xc3]61entry:62 %0 = tail call <32 x i8> @llvm.x86.avx10.vmovrsb256(ptr %__C)63 %1 = bitcast <4 x i64> %__A to <32 x i8>64 %2 = bitcast i32 %__B to <32 x i1>65 %3 = select <32 x i1> %2, <32 x i8> %0, <32 x i8> %166 %4 = bitcast <32 x i8> %3 to <4 x i64>67 ret <4 x i64> %468}69 70define <4 x i64> @test_mm256_maskz_movrsb_epu8(i32 %__A, ptr %__B) {71; CHECK-LABEL: test_mm256_maskz_movrsb_epu8:72; CHECK: # %bb.0: # %entry73; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]74; CHECK-NEXT: vmovrsb (%rsi), %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6f,0x06]75; CHECK-NEXT: retq # encoding: [0xc3]76entry:77 %0 = tail call <32 x i8> @llvm.x86.avx10.vmovrsb256(ptr %__B)78 %1 = bitcast i32 %__A to <32 x i1>79 %2 = select <32 x i1> %1, <32 x i8> %0, <32 x i8> zeroinitializer80 %3 = bitcast <32 x i8> %2 to <4 x i64>81 ret <4 x i64> %382}83 84define <2 x i64> @test_mm_movrsd_epu32(ptr %__A) {85; CHECK-LABEL: test_mm_movrsd_epu32:86; CHECK: # %bb.0: # %entry87; CHECK-NEXT: vmovrsd (%rdi), %xmm0 # encoding: [0x62,0xf5,0x7e,0x08,0x6f,0x07]88; CHECK-NEXT: retq # encoding: [0xc3]89entry:90 %0 = tail call <4 x i32> @llvm.x86.avx10.vmovrsd128(ptr %__A)91 %1 = bitcast <4 x i32> %0 to <2 x i64>92 ret <2 x i64> %193}94 95define <2 x i64> @test_mm_mask_movrsd_epu32(<2 x i64> %__A, i8 zeroext %__B, ptr %__C) {96; CHECK-LABEL: test_mm_mask_movrsd_epu32:97; CHECK: # %bb.0: # %entry98; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]99; CHECK-NEXT: vmovrsd (%rsi), %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x09,0x6f,0x06]100; CHECK-NEXT: retq # encoding: [0xc3]101entry:102 %0 = tail call <4 x i32> @llvm.x86.avx10.vmovrsd128(ptr %__C)103 %1 = bitcast <2 x i64> %__A to <4 x i32>104 %2 = bitcast i8 %__B to <8 x i1>105 %extract.i = shufflevector <8 x i1> %2, <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>106 %3 = select <4 x i1> %extract.i, <4 x i32> %0, <4 x i32> %1107 %4 = bitcast <4 x i32> %3 to <2 x i64>108 ret <2 x i64> %4109}110 111define <2 x i64> @test_mm_maskz_movrsd_epu32(i8 zeroext %__A, ptr %__B) {112; CHECK-LABEL: test_mm_maskz_movrsd_epu32:113; CHECK: # %bb.0: # %entry114; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]115; CHECK-NEXT: vmovrsd (%rsi), %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0x89,0x6f,0x06]116; CHECK-NEXT: retq # encoding: [0xc3]117entry:118 %0 = tail call <4 x i32> @llvm.x86.avx10.vmovrsd128(ptr %__B)119 %1 = bitcast i8 %__A to <8 x i1>120 %extract.i = shufflevector <8 x i1> %1, <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>121 %2 = select <4 x i1> %extract.i, <4 x i32> %0, <4 x i32> zeroinitializer122 %3 = bitcast <4 x i32> %2 to <2 x i64>123 ret <2 x i64> %3124}125 126define <4 x i64> @test_mm256_movrsd_epu32(ptr %__A) {127; CHECK-LABEL: test_mm256_movrsd_epu32:128; CHECK: # %bb.0: # %entry129; CHECK-NEXT: vmovrsd (%rdi), %ymm0 # encoding: [0x62,0xf5,0x7e,0x28,0x6f,0x07]130; CHECK-NEXT: retq # encoding: [0xc3]131entry:132 %0 = tail call <8 x i32> @llvm.x86.avx10.vmovrsd256(ptr %__A)133 %1 = bitcast <8 x i32> %0 to <4 x i64>134 ret <4 x i64> %1135}136 137define <4 x i64> @test_mm256_mask_movrsd_epu32(<4 x i64> %__A, i8 zeroext %__B, ptr %__C) {138; CHECK-LABEL: test_mm256_mask_movrsd_epu32:139; CHECK: # %bb.0: # %entry140; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]141; CHECK-NEXT: vmovrsd (%rsi), %ymm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x29,0x6f,0x06]142; CHECK-NEXT: retq # encoding: [0xc3]143entry:144 %0 = tail call <8 x i32> @llvm.x86.avx10.vmovrsd256(ptr %__C)145 %1 = bitcast <4 x i64> %__A to <8 x i32>146 %2 = bitcast i8 %__B to <8 x i1>147 %3 = select <8 x i1> %2, <8 x i32> %0, <8 x i32> %1148 %4 = bitcast <8 x i32> %3 to <4 x i64>149 ret <4 x i64> %4150}151 152define <4 x i64> @test_mm256_maskz_movrsd_epu32(i8 zeroext %__A, ptr %__B) {153; CHECK-LABEL: test_mm256_maskz_movrsd_epu32:154; CHECK: # %bb.0: # %entry155; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]156; CHECK-NEXT: vmovrsd (%rsi), %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xa9,0x6f,0x06]157; CHECK-NEXT: retq # encoding: [0xc3]158entry:159 %0 = tail call <8 x i32> @llvm.x86.avx10.vmovrsd256(ptr %__B)160 %1 = bitcast i8 %__A to <8 x i1>161 %2 = select <8 x i1> %1, <8 x i32> %0, <8 x i32> zeroinitializer162 %3 = bitcast <8 x i32> %2 to <4 x i64>163 ret <4 x i64> %3164}165 166define <2 x i64> @test_mm_movrsq_epu64(ptr %__A) {167; CHECK-LABEL: test_mm_movrsq_epu64:168; CHECK: # %bb.0: # %entry169; CHECK-NEXT: vmovrsq (%rdi), %xmm0 # encoding: [0x62,0xf5,0xfe,0x08,0x6f,0x07]170; CHECK-NEXT: retq # encoding: [0xc3]171entry:172 %0 = tail call <2 x i64> @llvm.x86.avx10.vmovrsq128(ptr %__A)173 ret <2 x i64> %0174}175 176define <2 x i64> @test_mm_mask_movrsq_epu64(<2 x i64> %__A, i8 zeroext %__B, ptr %__C) {177; CHECK-LABEL: test_mm_mask_movrsq_epu64:178; CHECK: # %bb.0: # %entry179; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]180; CHECK-NEXT: vmovrsq (%rsi), %xmm0 {%k1} # encoding: [0x62,0xf5,0xfe,0x09,0x6f,0x06]181; CHECK-NEXT: retq # encoding: [0xc3]182entry:183 %0 = tail call <2 x i64> @llvm.x86.avx10.vmovrsq128(ptr %__C)184 %1 = bitcast i8 %__B to <8 x i1>185 %extract.i = shufflevector <8 x i1> %1, <8 x i1> poison, <2 x i32> <i32 0, i32 1>186 %2 = select <2 x i1> %extract.i, <2 x i64> %0, <2 x i64> %__A187 ret <2 x i64> %2188}189 190define <2 x i64> @test_mm_maskz_movrsq_epu64(i8 zeroext %__A, ptr %__B) {191; CHECK-LABEL: test_mm_maskz_movrsq_epu64:192; CHECK: # %bb.0: # %entry193; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]194; CHECK-NEXT: vmovrsq (%rsi), %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xfe,0x89,0x6f,0x06]195; CHECK-NEXT: retq # encoding: [0xc3]196entry:197 %0 = tail call <2 x i64> @llvm.x86.avx10.vmovrsq128(ptr %__B)198 %1 = bitcast i8 %__A to <8 x i1>199 %extract.i = shufflevector <8 x i1> %1, <8 x i1> poison, <2 x i32> <i32 0, i32 1>200 %2 = select <2 x i1> %extract.i, <2 x i64> %0, <2 x i64> zeroinitializer201 ret <2 x i64> %2202}203 204define <4 x i64> @test_mm256_movrsq_epu64(ptr %__A) {205; CHECK-LABEL: test_mm256_movrsq_epu64:206; CHECK: # %bb.0: # %entry207; CHECK-NEXT: vmovrsq (%rdi), %ymm0 # encoding: [0x62,0xf5,0xfe,0x28,0x6f,0x07]208; CHECK-NEXT: retq # encoding: [0xc3]209entry:210 %0 = tail call <4 x i64> @llvm.x86.avx10.vmovrsq256(ptr %__A)211 ret <4 x i64> %0212}213 214define <4 x i64> @test_mm256_mask_movrsq_epu64(<4 x i64> %__A, i8 zeroext %__B, ptr %__C) {215; CHECK-LABEL: test_mm256_mask_movrsq_epu64:216; CHECK: # %bb.0: # %entry217; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]218; CHECK-NEXT: vmovrsq (%rsi), %ymm0 {%k1} # encoding: [0x62,0xf5,0xfe,0x29,0x6f,0x06]219; CHECK-NEXT: retq # encoding: [0xc3]220entry:221 %0 = tail call <4 x i64> @llvm.x86.avx10.vmovrsq256(ptr %__C)222 %1 = bitcast i8 %__B to <8 x i1>223 %extract.i = shufflevector <8 x i1> %1, <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>224 %2 = select <4 x i1> %extract.i, <4 x i64> %0, <4 x i64> %__A225 ret <4 x i64> %2226}227 228define <4 x i64> @test_mm256_maskz_movrsq_epu64(i8 zeroext %__A, ptr %__B) {229; CHECK-LABEL: test_mm256_maskz_movrsq_epu64:230; CHECK: # %bb.0: # %entry231; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]232; CHECK-NEXT: vmovrsq (%rsi), %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xfe,0xa9,0x6f,0x06]233; CHECK-NEXT: retq # encoding: [0xc3]234entry:235 %0 = tail call <4 x i64> @llvm.x86.avx10.vmovrsq256(ptr %__B)236 %1 = bitcast i8 %__A to <8 x i1>237 %extract.i = shufflevector <8 x i1> %1, <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>238 %2 = select <4 x i1> %extract.i, <4 x i64> %0, <4 x i64> zeroinitializer239 ret <4 x i64> %2240}241 242define <2 x i64> @test_mm_movrsw_epu16(ptr %__A) {243; CHECK-LABEL: test_mm_movrsw_epu16:244; CHECK: # %bb.0: # %entry245; CHECK-NEXT: vmovrsw (%rdi), %xmm0 # encoding: [0x62,0xf5,0xff,0x08,0x6f,0x07]246; CHECK-NEXT: retq # encoding: [0xc3]247entry:248 %0 = tail call <8 x i16> @llvm.x86.avx10.vmovrsw128(ptr %__A)249 %1 = bitcast <8 x i16> %0 to <2 x i64>250 ret <2 x i64> %1251}252 253define <2 x i64> @test_mm_mask_movrsw_epu16(<2 x i64> %__A, i8 zeroext %__B, ptr %__C) {254; CHECK-LABEL: test_mm_mask_movrsw_epu16:255; CHECK: # %bb.0: # %entry256; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]257; CHECK-NEXT: vmovrsw (%rsi), %xmm0 {%k1} # encoding: [0x62,0xf5,0xff,0x09,0x6f,0x06]258; CHECK-NEXT: retq # encoding: [0xc3]259entry:260 %0 = tail call <8 x i16> @llvm.x86.avx10.vmovrsw128(ptr %__C)261 %1 = bitcast <2 x i64> %__A to <8 x i16>262 %2 = bitcast i8 %__B to <8 x i1>263 %3 = select <8 x i1> %2, <8 x i16> %0, <8 x i16> %1264 %4 = bitcast <8 x i16> %3 to <2 x i64>265 ret <2 x i64> %4266}267 268define <2 x i64> @test_mm_maskz_movrsw_epu16(i8 zeroext %__A, ptr %__B) {269; CHECK-LABEL: test_mm_maskz_movrsw_epu16:270; CHECK: # %bb.0: # %entry271; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]272; CHECK-NEXT: vmovrsw (%rsi), %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0xff,0x89,0x6f,0x06]273; CHECK-NEXT: retq # encoding: [0xc3]274entry:275 %0 = tail call <8 x i16> @llvm.x86.avx10.vmovrsw128(ptr %__B)276 %1 = bitcast i8 %__A to <8 x i1>277 %2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer278 %3 = bitcast <8 x i16> %2 to <2 x i64>279 ret <2 x i64> %3280}281 282define <4 x i64> @test_mm256_movrsw_epu16(ptr %__A) {283; CHECK-LABEL: test_mm256_movrsw_epu16:284; CHECK: # %bb.0: # %entry285; CHECK-NEXT: vmovrsw (%rdi), %ymm0 # encoding: [0x62,0xf5,0xff,0x28,0x6f,0x07]286; CHECK-NEXT: retq # encoding: [0xc3]287entry:288 %0 = tail call <16 x i16> @llvm.x86.avx10.vmovrsw256(ptr %__A)289 %1 = bitcast <16 x i16> %0 to <4 x i64>290 ret <4 x i64> %1291}292 293define <4 x i64> @test_mm256_mask_movrsw_epu16(<4 x i64> %__A, i16 zeroext %__B, ptr %__C) {294; CHECK-LABEL: test_mm256_mask_movrsw_epu16:295; CHECK: # %bb.0: # %entry296; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]297; CHECK-NEXT: vmovrsw (%rsi), %ymm0 {%k1} # encoding: [0x62,0xf5,0xff,0x29,0x6f,0x06]298; CHECK-NEXT: retq # encoding: [0xc3]299entry:300 %0 = tail call <16 x i16> @llvm.x86.avx10.vmovrsw256(ptr %__C)301 %1 = bitcast <4 x i64> %__A to <16 x i16>302 %2 = bitcast i16 %__B to <16 x i1>303 %3 = select <16 x i1> %2, <16 x i16> %0, <16 x i16> %1304 %4 = bitcast <16 x i16> %3 to <4 x i64>305 ret <4 x i64> %4306}307 308define <4 x i64> @test_mm256_maskz_movrsw_epu16(i16 zeroext %__A, ptr %__B) {309; CHECK-LABEL: test_mm256_maskz_movrsw_epu16:310; CHECK: # %bb.0: # %entry311; CHECK-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]312; CHECK-NEXT: vmovrsw (%rsi), %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0xff,0xa9,0x6f,0x06]313; CHECK-NEXT: retq # encoding: [0xc3]314entry:315 %0 = tail call <16 x i16> @llvm.x86.avx10.vmovrsw256(ptr %__B)316 %1 = bitcast i16 %__A to <16 x i1>317 %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer318 %3 = bitcast <16 x i16> %2 to <4 x i64>319 ret <4 x i64> %3320}321 322declare <16 x i8> @llvm.x86.avx10.vmovrsb128(ptr)323declare <32 x i8> @llvm.x86.avx10.vmovrsb256(ptr)324declare <4 x i32> @llvm.x86.avx10.vmovrsd128(ptr)325declare <8 x i32> @llvm.x86.avx10.vmovrsd256(ptr)326declare <2 x i64> @llvm.x86.avx10.vmovrsq128(ptr)327declare <4 x i64> @llvm.x86.avx10.vmovrsq256(ptr)328declare <8 x i16> @llvm.x86.avx10.vmovrsw128(ptr)329declare <16 x i16> @llvm.x86.avx10.vmovrsw256(ptr)330