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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown -relocation-model=pic %s -o - | FileCheck %s3 4; Tests come from "clang/test/CodeGen/ms-inline-asm-variables.c"5; int gVar;6; void t1() {7; __asm add eax, dword ptr gVar[rax]8; __asm add dword ptr [rax+gVar], eax9; __asm add ebx, dword ptr gVar[271 - 82 + 81 + rbx]10; __asm add dword ptr [rbx + gVar + 828], ebx11; gVar = 3;12; }13;14; void t2(void) {15; int lVar;16; __asm mov eax, dword ptr lVar[rax]17; __asm mov dword ptr [rax+lVar], eax18; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + rbx]19; __asm mov dword ptr [rbx + lVar + 828], ebx20; __asm mov 5 + 8 + 13 + 21[lVar + rbx], eax21; lVar = 2;22; }23 24@gVar = global i32 0, align 425 26; Function Attrs: noinline nounwind optnone uwtable27define void @t1() #0 {28; CHECK-LABEL: t1:29; CHECK: # %bb.0: # %entry30; CHECK-NEXT: pushq %rbp31; CHECK-NEXT: .cfi_def_cfa_offset 1632; CHECK-NEXT: .cfi_offset %rbp, -1633; CHECK-NEXT: movq %rsp, %rbp34; CHECK-NEXT: .cfi_def_cfa_register %rbp35; CHECK-NEXT: pushq %rbx36; CHECK-NEXT: .cfi_offset %rbx, -2437; CHECK-NEXT: movq gVar@GOTPCREL(%rip), %rcx38; CHECK-NEXT: #APP39; CHECK-EMPTY:40; CHECK-NEXT: addl (%rcx,%rax), %eax41; CHECK-NEXT: addl %eax, (%rcx,%rax)42; CHECK-NEXT: addl 270(%rcx,%rbx), %ebx43; CHECK-NEXT: addl %ebx, 828(%rcx,%rbx)44; CHECK-EMPTY:45; CHECK-NEXT: #NO_APP46; CHECK-NEXT: movq gVar@GOTPCREL(%rip), %rax47; CHECK-NEXT: movl $3, (%rax)48; CHECK-NEXT: popq %rbx49; CHECK-NEXT: popq %rbp50; CHECK-NEXT: .cfi_def_cfa %rsp, 851; CHECK-NEXT: retq52entry:53 call void asm sideeffect inteldialect "add eax, dword ptr $2[rax]\0A\09add dword ptr $0[rax], eax\0A\09add ebx, dword ptr $3[rbx + $$270]\0A\09add dword ptr $1[rbx + $$828], ebx", "=*m,=*m,*m,*m,~{eax},~{ebx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar) #154 store i32 3, ptr @gVar, align 455 ret void56}57 58; Function Attrs: noinline nounwind optnone uwtable59define void @t2() #0 {60; CHECK-LABEL: t2:61; CHECK: # %bb.0: # %entry62; CHECK-NEXT: pushq %rbp63; CHECK-NEXT: .cfi_def_cfa_offset 1664; CHECK-NEXT: .cfi_offset %rbp, -1665; CHECK-NEXT: movq %rsp, %rbp66; CHECK-NEXT: .cfi_def_cfa_register %rbp67; CHECK-NEXT: pushq %rbx68; CHECK-NEXT: .cfi_offset %rbx, -2469; CHECK-NEXT: #APP70; CHECK-EMPTY:71; CHECK-NEXT: movl -12(%rbp,%rax), %eax72; CHECK-NEXT: movl %eax, -12(%rbp,%rax)73; CHECK-NEXT: movl 258(%rbp,%rbx), %ebx74; CHECK-NEXT: movl %ebx, 816(%rbp,%rbx)75; CHECK-NEXT: movl %eax, 35(%rbp,%rbx)76; CHECK-EMPTY:77; CHECK-NEXT: #NO_APP78; CHECK-NEXT: movl $2, -12(%rbp)79; CHECK-NEXT: popq %rbx80; CHECK-NEXT: popq %rbp81; CHECK-NEXT: .cfi_def_cfa %rsp, 882; CHECK-NEXT: retq83entry:84 %lVar = alloca i32, align 485 call void asm sideeffect inteldialect "mov eax, dword ptr $3[rax]\0A\09mov dword ptr $0[rax], eax\0A\09mov ebx, dword ptr $4[rbx + $$270]\0A\09mov dword ptr $1[rbx + $$828], ebx\0A\09mov $2[rbx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar) #186 store i32 2, ptr %lVar, align 487 ret void88}89 90attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }91attributes #1 = { nounwind }92 93!llvm.module.flags = !{!0}94 95!0 = !{i32 1, !"wchar_size", i32 4}96