105 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown %s -o - | FileCheck %s3 4; Tests similar with "clang/test/CodeGen/ms-inline-asm-variables.c"5; // clang -fasm-blocks -target x86_64-unknown-unknown -S6 7; int gVar;8; void t1() {9; __asm add eax, dword ptr gVar[rax]10; __asm add dword ptr [rax+gVar], eax11; __asm add ebx, dword ptr gVar[271 - 82 + 81 + rbx]12; __asm add dword ptr [rbx + gVar + 828], ebx13; __asm add ecx, dword ptr gVar[4590 + rcx + rcx*4]14; __asm add dword ptr [gVar + rcx + 45 + 23 - 53 + 60 - 2 + rcx*8], ecx15; __asm add 1 + 1 + 2 + 3[gVar + rcx + rbx], eax16;17; gVar += 2;18; }19;20; void t2(void) {21; int lVar;22; __asm mov eax, dword ptr lVar[rax]23; __asm mov dword ptr [rax+lVar], eax24; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + rbx]25; __asm mov dword ptr [rbx + lVar + 828], ebx26; __asm mov 5 + 8 + 13 + 21[lVar + rbx], eax27; }28 29@gVar = dso_local global i32 0, align 430 31; Function Attrs: noinline nounwind optnone uwtable32define dso_local void @t1() #0 {33; CHECK-LABEL: t1:34; CHECK: # %bb.0: # %entry35; CHECK-NEXT: pushq %rbp36; CHECK-NEXT: .cfi_def_cfa_offset 1637; CHECK-NEXT: .cfi_offset %rbp, -1638; CHECK-NEXT: movq %rsp, %rbp39; CHECK-NEXT: .cfi_def_cfa_register %rbp40; CHECK-NEXT: pushq %rbx41; CHECK-NEXT: .cfi_offset %rbx, -2442; CHECK-NEXT: #APP43; CHECK-EMPTY:44; CHECK-NEXT: addl gVar(,%rax), %eax45; CHECK-NEXT: addl %eax, gVar(,%rax)46; CHECK-NEXT: addl gVar+270(,%rbx), %ebx47; CHECK-NEXT: addl %ebx, gVar+828(,%rbx)48; CHECK-NEXT: addl gVar+4590(%rcx,%rcx,4), %ecx49; CHECK-NEXT: addl %ecx, gVar+73(%rcx,%rcx,8)50; CHECK-NEXT: addl %eax, gVar+7(%rcx,%rbx)51; CHECK-EMPTY:52; CHECK-NEXT: #NO_APP53; CHECK-NEXT: movl gVar, %eax54; CHECK-NEXT: addl $2, %eax55; CHECK-NEXT: movl %eax, gVar56; CHECK-NEXT: popq %rbx57; CHECK-NEXT: popq %rbp58; CHECK-NEXT: .cfi_def_cfa %rsp, 859; CHECK-NEXT: retq60entry:61 call void asm sideeffect inteldialect "add eax, dword ptr $4[rax]\0A\09add dword ptr $0[rax], eax\0A\09add ebx, dword ptr $5[rbx + $$270]\0A\09add dword ptr $1[rbx + $$828], ebx\0A\09add ecx, dword ptr ${6:P}[rcx + rcx * $$4 + $$4590]\0A\09add dword ptr ${2:P}[rcx + rcx * $$8 + $$73], ecx\0A\09add ${3:P}[rcx + rbx + $$7], eax", "=*m,=*m,=*m,=*m,*m,*m,*m,~{eax},~{ebx},~{ecx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar) #162 %0 = load i32, ptr @gVar, align 463 %add = add nsw i32 %0, 264 store i32 %add, ptr @gVar, align 465 ret void66}67 68; Function Attrs: noinline nounwind optnone uwtable69define dso_local void @t2() #0 {70; CHECK-LABEL: t2:71; CHECK: # %bb.0: # %entry72; CHECK-NEXT: pushq %rbp73; CHECK-NEXT: .cfi_def_cfa_offset 1674; CHECK-NEXT: .cfi_offset %rbp, -1675; CHECK-NEXT: movq %rsp, %rbp76; CHECK-NEXT: .cfi_def_cfa_register %rbp77; CHECK-NEXT: pushq %rbx78; CHECK-NEXT: .cfi_offset %rbx, -2479; CHECK-NEXT: #APP80; CHECK-EMPTY:81; CHECK-NEXT: movl -12(%rbp,%rax), %eax82; CHECK-NEXT: movl %eax, -12(%rbp,%rax)83; CHECK-NEXT: movl 258(%rbp,%rbx), %ebx84; CHECK-NEXT: movl %ebx, 816(%rbp,%rbx)85; CHECK-NEXT: movl %eax, 35(%rbp,%rbx)86; CHECK-EMPTY:87; CHECK-NEXT: #NO_APP88; CHECK-NEXT: popq %rbx89; CHECK-NEXT: popq %rbp90; CHECK-NEXT: .cfi_def_cfa %rsp, 891; CHECK-NEXT: retq92entry:93 %lVar = alloca i32, align 494 call void asm sideeffect inteldialect "mov eax, dword ptr $3[rax]\0A\09mov dword ptr $0[rax], eax\0A\09mov ebx, dword ptr $4[rbx + $$270]\0A\09mov dword ptr $1[rbx + $$828], ebx\0A\09mov $2[rbx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar) #195 ret void96}97 98attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }99attributes #1 = { nounwind }100 101!llvm.module.flags = !{!0, !1}102 103!0 = !{i32 1, !"wchar_size", i32 4}104!1 = !{i32 7, !"uwtable", i32 2}105