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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s3; RUN: llc -mtriple=i386-unknown-unknown -relocation-model=pic %s -o -| FileCheck --check-prefix=X86PIC %s4 5; Tests come from clang/test/CodeGen/ms-inline-asm-variables.c6;7; int gVar;8; void t1() {9; __asm add eax, dword ptr gVar[eax]10; __asm add dword ptr [eax+gVar], eax11; __asm add ebx, dword ptr gVar[271 - 82 + 81 + ebx]12; __asm add dword ptr [ebx + gVar + 828], ebx13; gVar = 3;14; }15;16; void t2(void) {17; int lVar;18; __asm mov eax, dword ptr lVar[eax]19; __asm mov dword ptr [eax+lVar], eax20; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + ebx]21; __asm mov dword ptr [ebx + lVar + 828], ebx22; __asm mov 5 + 8 + 13 + 21[lVar + ebx], eax23; lVar = 2;24; }25 26@gVar = global i32 0, align 427 28; Function Attrs: noinline nounwind optnone uwtable29define void @t1() #0 {30; X86-LABEL: t1:31; X86: # %bb.0: # %entry32; X86-NEXT: pushl %ebp33; X86-NEXT: .cfi_def_cfa_offset 834; X86-NEXT: .cfi_offset %ebp, -835; X86-NEXT: movl %esp, %ebp36; X86-NEXT: .cfi_def_cfa_register %ebp37; X86-NEXT: pushl %ebx38; X86-NEXT: .cfi_offset %ebx, -1239; X86-NEXT: #APP40; X86-EMPTY:41; X86-NEXT: addl gVar(%eax), %eax42; X86-NEXT: addl %eax, gVar(%eax)43; X86-NEXT: addl gVar+270(%ebx), %ebx44; X86-NEXT: addl %ebx, gVar+828(%ebx)45; X86-EMPTY:46; X86-NEXT: #NO_APP47; X86-NEXT: movl $3, gVar48; X86-NEXT: popl %ebx49; X86-NEXT: popl %ebp50; X86-NEXT: .cfi_def_cfa %esp, 451; X86-NEXT: retl52;53; X86PIC-LABEL: t1:54; X86PIC: # %bb.0: # %entry55; X86PIC-NEXT: pushl %ebp56; X86PIC-NEXT: .cfi_def_cfa_offset 857; X86PIC-NEXT: .cfi_offset %ebp, -858; X86PIC-NEXT: movl %esp, %ebp59; X86PIC-NEXT: .cfi_def_cfa_register %ebp60; X86PIC-NEXT: pushl %ebx61; X86PIC-NEXT: .cfi_offset %ebx, -1262; X86PIC-NEXT: calll .L0$pb63; X86PIC-NEXT: .L0$pb:64; X86PIC-NEXT: popl %ecx65; X86PIC-NEXT: .Ltmp0:66; X86PIC-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %ecx67; X86PIC-NEXT: movl gVar@GOT(%ecx), %edx68; X86PIC-NEXT: #APP69; X86PIC-EMPTY:70; X86PIC-NEXT: addl (%edx,%eax), %eax71; X86PIC-NEXT: addl %eax, (%edx,%eax)72; X86PIC-NEXT: addl 270(%edx,%ebx), %ebx73; X86PIC-NEXT: addl %ebx, 828(%edx,%ebx)74; X86PIC-EMPTY:75; X86PIC-NEXT: #NO_APP76; X86PIC-NEXT: movl gVar@GOT(%ecx), %eax77; X86PIC-NEXT: movl $3, (%eax)78; X86PIC-NEXT: popl %ebx79; X86PIC-NEXT: popl %ebp80; X86PIC-NEXT: .cfi_def_cfa %esp, 481; X86PIC-NEXT: retl82entry:83 call void asm sideeffect inteldialect "add eax, dword ptr $2[eax]\0A\09add dword ptr $0[eax], eax\0A\09add ebx, dword ptr $3[ebx + $$270]\0A\09add dword ptr $1[ebx + $$828], ebx", "=*m,=*m,*m,*m,~{eax},~{ebx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar)84 store i32 3, ptr @gVar, align 485 ret void86}87 88; Function Attrs: noinline nounwind optnone uwtable89define void @t2() #0 {90; X86-LABEL: t2:91; X86: # %bb.0: # %entry92; X86-NEXT: pushl %ebp93; X86-NEXT: .cfi_def_cfa_offset 894; X86-NEXT: .cfi_offset %ebp, -895; X86-NEXT: movl %esp, %ebp96; X86-NEXT: .cfi_def_cfa_register %ebp97; X86-NEXT: pushl %ebx98; X86-NEXT: pushl %eax99; X86-NEXT: .cfi_offset %ebx, -12100; X86-NEXT: #APP101; X86-EMPTY:102; X86-NEXT: movl -8(%ebp,%eax), %eax103; X86-NEXT: movl %eax, -8(%ebp,%eax)104; X86-NEXT: movl 262(%ebp,%ebx), %ebx105; X86-NEXT: movl %ebx, 820(%ebp,%ebx)106; X86-NEXT: movl %eax, 39(%ebp,%ebx)107; X86-EMPTY:108; X86-NEXT: #NO_APP109; X86-NEXT: movl $2, -8(%ebp)110; X86-NEXT: addl $4, %esp111; X86-NEXT: popl %ebx112; X86-NEXT: popl %ebp113; X86-NEXT: .cfi_def_cfa %esp, 4114; X86-NEXT: retl115;116; X86PIC-LABEL: t2:117; X86PIC: # %bb.0: # %entry118; X86PIC-NEXT: pushl %ebp119; X86PIC-NEXT: .cfi_def_cfa_offset 8120; X86PIC-NEXT: .cfi_offset %ebp, -8121; X86PIC-NEXT: movl %esp, %ebp122; X86PIC-NEXT: .cfi_def_cfa_register %ebp123; X86PIC-NEXT: pushl %ebx124; X86PIC-NEXT: pushl %eax125; X86PIC-NEXT: .cfi_offset %ebx, -12126; X86PIC-NEXT: #APP127; X86PIC-EMPTY:128; X86PIC-NEXT: movl -8(%ebp,%eax), %eax129; X86PIC-NEXT: movl %eax, -8(%ebp,%eax)130; X86PIC-NEXT: movl 262(%ebp,%ebx), %ebx131; X86PIC-NEXT: movl %ebx, 820(%ebp,%ebx)132; X86PIC-NEXT: movl %eax, 39(%ebp,%ebx)133; X86PIC-EMPTY:134; X86PIC-NEXT: #NO_APP135; X86PIC-NEXT: movl $2, -8(%ebp)136; X86PIC-NEXT: addl $4, %esp137; X86PIC-NEXT: popl %ebx138; X86PIC-NEXT: popl %ebp139; X86PIC-NEXT: .cfi_def_cfa %esp, 4140; X86PIC-NEXT: retl141entry:142 %lVar = alloca i32, align 4143 call void asm sideeffect inteldialect "mov eax, dword ptr $3[eax]\0A\09mov dword ptr $0[eax], eax\0A\09mov ebx, dword ptr $4[ebx + $$270]\0A\09mov dword ptr $1[ebx + $$828], ebx\0A\09mov $2[ebx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar)144 store i32 2, ptr %lVar, align 4145 ret void146}147 148attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }149attributes #1 = { nounwind }150 151!llvm.module.flags = !{!0}152 153!0 = !{i32 1, !"NumRegisterParameters", i32 0}154