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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s3 4define i64 @muladd_demand(i64 %x, i64 %y) {5; CHECK-LABEL: muladd_demand:6; CHECK: # %bb.0:7; CHECK-NEXT: movq %rsi, %rax8; CHECK-NEXT: shll $6, %edi9; CHECK-NEXT: subl %edi, %eax10; CHECK-NEXT: shlq $47, %rax11; CHECK-NEXT: retq12 %m = mul i64 %x, 131008 ; 0x0001ffc013 %a = add i64 %m, %y14 %r = shl i64 %a, 4715 ret i64 %r16}17 18define <2 x i64> @muladd_demand_commute(<2 x i64> %x, <2 x i64> %y) {19; CHECK-LABEL: muladd_demand_commute:20; CHECK: # %bb.0:21; CHECK-NEXT: psllq $6, %xmm022; CHECK-NEXT: psubq %xmm0, %xmm123; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm124; CHECK-NEXT: movdqa %xmm1, %xmm025; CHECK-NEXT: retq26 %m = mul <2 x i64> %x, <i64 131008, i64 131008>27 %a = add <2 x i64> %y, %m28 %r = and <2 x i64> %a, <i64 131071, i64 131071>29 ret <2 x i64> %r30}31