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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s3%0 = type { i64, i64 }4%1 = type { i128, i1 }5 6; This used to call muloti4, but that won't link with libgcc.7define %0 @x(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nounwind uwtable ssp {8; CHECK-LABEL: x:9; CHECK: ## %bb.0: ## %entry10; CHECK-NEXT: pushq %r1411; CHECK-NEXT: .cfi_def_cfa_offset 1612; CHECK-NEXT: pushq %rbx13; CHECK-NEXT: .cfi_def_cfa_offset 2414; CHECK-NEXT: .cfi_offset %rbx, -2415; CHECK-NEXT: .cfi_offset %r14, -1616; CHECK-NEXT: movq %rdx, %r917; CHECK-NEXT: movq %rsi, %r818; CHECK-NEXT: movq %rsi, %rbx19; CHECK-NEXT: sarq $63, %rbx20; CHECK-NEXT: imulq %rdx, %rbx21; CHECK-NEXT: movq %rdi, %rax22; CHECK-NEXT: mulq %rdx23; CHECK-NEXT: movq %rdx, %r1024; CHECK-NEXT: movq %rax, %rsi25; CHECK-NEXT: movq %r8, %rax26; CHECK-NEXT: mulq %r927; CHECK-NEXT: movq %rdx, %r928; CHECK-NEXT: movq %rax, %r1129; CHECK-NEXT: addq %r10, %r1130; CHECK-NEXT: adcq %rbx, %r931; CHECK-NEXT: movq %r9, %rbx32; CHECK-NEXT: sarq $63, %rbx33; CHECK-NEXT: movq %rcx, %r1434; CHECK-NEXT: sarq $63, %r1435; CHECK-NEXT: imulq %rdi, %r1436; CHECK-NEXT: movq %rdi, %rax37; CHECK-NEXT: mulq %rcx38; CHECK-NEXT: movq %rdx, %r1039; CHECK-NEXT: movq %rax, %rdi40; CHECK-NEXT: addq %r11, %rdi41; CHECK-NEXT: adcq %r14, %r1042; CHECK-NEXT: movq %r10, %r1143; CHECK-NEXT: sarq $63, %r1144; CHECK-NEXT: addq %r9, %r1045; CHECK-NEXT: adcq %rbx, %r1146; CHECK-NEXT: movq %r8, %rax47; CHECK-NEXT: imulq %rcx48; CHECK-NEXT: addq %r10, %rax49; CHECK-NEXT: adcq %r11, %rdx50; CHECK-NEXT: movq %rdi, %rcx51; CHECK-NEXT: sarq $63, %rcx52; CHECK-NEXT: xorq %rcx, %rdx53; CHECK-NEXT: xorq %rax, %rcx54; CHECK-NEXT: orq %rdx, %rcx55; CHECK-NEXT: jne LBB0_156; CHECK-NEXT: ## %bb.2: ## %nooverflow57; CHECK-NEXT: movq %rsi, %rax58; CHECK-NEXT: movq %rdi, %rdx59; CHECK-NEXT: popq %rbx60; CHECK-NEXT: popq %r1461; CHECK-NEXT: retq62; CHECK-NEXT: LBB0_1: ## %overflow63; CHECK-NEXT: ud264entry:65 %tmp16 = zext i64 %a.coerce0 to i12866 %tmp11 = zext i64 %a.coerce1 to i12867 %tmp12 = shl nuw i128 %tmp11, 6468 %ins14 = or i128 %tmp12, %tmp1669 %tmp6 = zext i64 %b.coerce0 to i12870 %tmp3 = zext i64 %b.coerce1 to i12871 %tmp4 = shl nuw i128 %tmp3, 6472 %ins = or i128 %tmp4, %tmp673 %0 = tail call %1 @llvm.smul.with.overflow.i128(i128 %ins14, i128 %ins)74 %1 = extractvalue %1 %0, 075 %2 = extractvalue %1 %0, 176 br i1 %2, label %overflow, label %nooverflow77 78overflow: ; preds = %entry79 tail call void @llvm.trap()80 unreachable81 82nooverflow: ; preds = %entry83 %tmp20 = trunc i128 %1 to i6484 %tmp21 = insertvalue %0 undef, i64 %tmp20, 085 %tmp22 = lshr i128 %1, 6486 %tmp23 = trunc i128 %tmp22 to i6487 %tmp24 = insertvalue %0 %tmp21, i64 %tmp23, 188 ret %0 %tmp2489}90 91declare %1 @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone92 93declare void @llvm.trap() nounwind94