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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s3; PR50394 5define i32 @test1(i32 %x) nounwind {6; CHECK-LABEL: test1:7; CHECK: # %bb.0:8; CHECK-NEXT: movl %edi, %eax9; CHECK-NEXT: andl $31, %eax10; CHECK-NEXT: shll $10, %eax11; CHECK-NEXT: retq12 %and = shl i32 %x, 1013 %shl = and i32 %and, 3174414 ret i32 %shl15}16 17define i32 @test2(i32 %x) nounwind {18; CHECK-LABEL: test2:19; CHECK: # %bb.0:20; CHECK-NEXT: movl %edi, %eax21; CHECK-NEXT: orl $31, %eax22; CHECK-NEXT: shll $10, %eax23; CHECK-NEXT: retq24 %or = shl i32 %x, 1025 %shl = or i32 %or, 3174426 ret i32 %shl27}28 29define i32 @test3(i32 %x) nounwind {30; CHECK-LABEL: test3:31; CHECK: # %bb.0:32; CHECK-NEXT: movl %edi, %eax33; CHECK-NEXT: xorl $31, %eax34; CHECK-NEXT: shll $10, %eax35; CHECK-NEXT: retq36 %xor = shl i32 %x, 1037 %shl = xor i32 %xor, 3174438 ret i32 %shl39}40 41define i64 @test4(i64 %x) nounwind {42; CHECK-LABEL: test4:43; CHECK: # %bb.0:44; CHECK-NEXT: movq %rdi, %rax45; CHECK-NEXT: andl $241, %eax46; CHECK-NEXT: shlq $40, %rax47; CHECK-NEXT: retq48 %and = shl i64 %x, 4049 %shl = and i64 %and, 26498230229401650 ret i64 %shl51}52 53define i64 @test5(i64 %x) nounwind {54; CHECK-LABEL: test5:55; CHECK: # %bb.0:56; CHECK-NEXT: movq %rdi, %rax57; CHECK-NEXT: andl $31, %eax58; CHECK-NEXT: shlq $40, %rax59; CHECK-NEXT: retq60 %and = shl i64 %x, 4061 %shl = and i64 %and, 3408486046105662 ret i64 %shl63}64 65define i64 @test6(i64 %x) nounwind {66; CHECK-LABEL: test6:67; CHECK: # %bb.0:68; CHECK-NEXT: movq %rdi, %rax69; CHECK-NEXT: andl $-65536, %eax # imm = 0xFFFF000070; CHECK-NEXT: shlq $32, %rax71; CHECK-NEXT: retq72 %and = shl i64 %x, 3273 %shl = and i64 %and, -28147497671065674 ret i64 %shl75}76 77define i64 @test7(i64 %x) nounwind {78; CHECK-LABEL: test7:79; CHECK: # %bb.0:80; CHECK-NEXT: movq %rdi, %rax81; CHECK-NEXT: orq $241, %rax82; CHECK-NEXT: shlq $40, %rax83; CHECK-NEXT: retq84 %or = shl i64 %x, 4085 %shl = or i64 %or, 26498230229401686 ret i64 %shl87}88 89define i64 @test8(i64 %x) nounwind {90; CHECK-LABEL: test8:91; CHECK: # %bb.0:92; CHECK-NEXT: movq %rdi, %rax93; CHECK-NEXT: orq $31, %rax94; CHECK-NEXT: shlq $40, %rax95; CHECK-NEXT: retq96 %or = shl i64 %x, 4097 %shl = or i64 %or, 3408486046105698 ret i64 %shl99}100 101define i64 @test9(i64 %x) nounwind {102; CHECK-LABEL: test9:103; CHECK: # %bb.0:104; CHECK-NEXT: movq %rdi, %rax105; CHECK-NEXT: xorq $241, %rax106; CHECK-NEXT: shlq $40, %rax107; CHECK-NEXT: retq108 %xor = shl i64 %x, 40109 %shl = xor i64 %xor, 264982302294016110 ret i64 %shl111}112 113define i64 @test10(i64 %x) nounwind {114; CHECK-LABEL: test10:115; CHECK: # %bb.0:116; CHECK-NEXT: movq %rdi, %rax117; CHECK-NEXT: xorq $31, %rax118; CHECK-NEXT: shlq $40, %rax119; CHECK-NEXT: retq120 %xor = shl i64 %x, 40121 %shl = xor i64 %xor, 34084860461056122 ret i64 %shl123}124 125define i64 @test11(i64 %x) nounwind {126; CHECK-LABEL: test11:127; CHECK: # %bb.0:128; CHECK-NEXT: movq %rdi, %rax129; CHECK-NEXT: xorq $-65536, %rax # imm = 0xFFFF0000130; CHECK-NEXT: shlq $33, %rax131; CHECK-NEXT: retq132 %xor = shl i64 %x, 33133 %shl = xor i64 %xor, -562949953421312134 ret i64 %shl135}136 137; PR23098138define i32 @test12(i32 %x, ptr %y) nounwind {139; CHECK-LABEL: test12:140; CHECK: # %bb.0:141; CHECK-NEXT: addl %edi, %edi142; CHECK-NEXT: movzbl %dil, %eax143; CHECK-NEXT: movl %eax, (%rsi)144; CHECK-NEXT: retq145 %and = shl i32 %x, 1146 %shl = and i32 %and, 255147 store i32 %shl, ptr %y148 ret i32 %shl149}150 151define i64 @test13(i64 %x, ptr %y) nounwind {152; CHECK-LABEL: test13:153; CHECK: # %bb.0:154; CHECK-NEXT: addl %edi, %edi155; CHECK-NEXT: movzbl %dil, %eax156; CHECK-NEXT: movq %rax, (%rsi)157; CHECK-NEXT: retq158 %and = shl i64 %x, 1159 %shl = and i64 %and, 255160 store i64 %shl, ptr %y161 ret i64 %shl162}163 164define i64 @test14(i64 %x, ptr %y) nounwind {165; CHECK-LABEL: test14:166; CHECK: # %bb.0:167; CHECK-NEXT: movq %rdi, %rax168; CHECK-NEXT: andl $-16777216, %eax # imm = 0xFF000000169; CHECK-NEXT: shlq $8, %rax170; CHECK-NEXT: retq171 %and = shl i64 %x, 8172 %shl = and i64 %and, 1095216660480173 ret i64 %shl174}175 176define i64 @test15(i64 %x, ptr %y) nounwind {177; CHECK-LABEL: test15:178; CHECK: # %bb.0:179; CHECK-NEXT: movl $4278190080, %eax # imm = 0xFF000000180; CHECK-NEXT: orq %rdi, %rax181; CHECK-NEXT: shlq $8, %rax182; CHECK-NEXT: retq183 %or = shl i64 %x, 8184 %shl = or i64 %or, 1095216660480185 ret i64 %shl186}187 188define i64 @test16(i64 %x, ptr %y) nounwind {189; CHECK-LABEL: test16:190; CHECK: # %bb.0:191; CHECK-NEXT: movl $4278190080, %eax # imm = 0xFF000000192; CHECK-NEXT: xorq %rdi, %rax193; CHECK-NEXT: shlq $8, %rax194; CHECK-NEXT: retq195 %xor = shl i64 %x, 8196 %shl = xor i64 %xor, 1095216660480197 ret i64 %shl198}199 200define i32 @test17(i32 %x) nounwind {201; CHECK-LABEL: test17:202; CHECK: # %bb.0:203; CHECK-NEXT: movzbl %dil, %eax204; CHECK-NEXT: shll $10, %eax205; CHECK-NEXT: retq206 %and = shl i32 %x, 10207 %shl = and i32 %and, 261120208 ret i32 %shl209}210 211define i64 @test18(i64 %x) nounwind {212; CHECK-LABEL: test18:213; CHECK: # %bb.0:214; CHECK-NEXT: movzbl %dil, %eax215; CHECK-NEXT: shll $10, %eax216; CHECK-NEXT: retq217 %and = shl i64 %x, 10218 %shl = and i64 %and, 261120219 ret i64 %shl220}221 222define i32 @test19(i32 %x) nounwind {223; CHECK-LABEL: test19:224; CHECK: # %bb.0:225; CHECK-NEXT: movzwl %di, %eax226; CHECK-NEXT: shll $10, %eax227; CHECK-NEXT: retq228 %and = shl i32 %x, 10229 %shl = and i32 %and, 67107840230 ret i32 %shl231}232 233define i64 @test20(i64 %x) nounwind {234; CHECK-LABEL: test20:235; CHECK: # %bb.0:236; CHECK-NEXT: movzwl %di, %eax237; CHECK-NEXT: shll $10, %eax238; CHECK-NEXT: retq239 %and = shl i64 %x, 10240 %shl = and i64 %and, 67107840241 ret i64 %shl242}243 244define i64 @test21(i64 %x) nounwind {245; CHECK-LABEL: test21:246; CHECK: # %bb.0:247; CHECK-NEXT: movl %edi, %eax248; CHECK-NEXT: shlq $10, %rax249; CHECK-NEXT: retq250 %and = shl i64 %x, 10251 %shl = and i64 %and, 4398046510080252 ret i64 %shl253}254