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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X643; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s --check-prefix=X324 5define i8 @select_i8_neg1_or_0(i1 %a) {6; X64-LABEL: select_i8_neg1_or_0:7; X64: # %bb.0:8; X64-NEXT: movl %edi, %eax9; X64-NEXT: andb $1, %al10; X64-NEXT: negb %al11; X64-NEXT: # kill: def $al killed $al killed $eax12; X64-NEXT: retq13;14; X32-LABEL: select_i8_neg1_or_0:15; X32: # %bb.0:16; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax17; X32-NEXT: andb $1, %al18; X32-NEXT: negb %al19; X32-NEXT: retl20 %b = sext i1 %a to i821 ret i8 %b22}23 24define i8 @select_i8_neg1_or_0_zeroext(i1 zeroext %a) {25; X64-LABEL: select_i8_neg1_or_0_zeroext:26; X64: # %bb.0:27; X64-NEXT: movl %edi, %eax28; X64-NEXT: negb %al29; X64-NEXT: # kill: def $al killed $al killed $eax30; X64-NEXT: retq31;32; X32-LABEL: select_i8_neg1_or_0_zeroext:33; X32: # %bb.0:34; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax35; X32-NEXT: negb %al36; X32-NEXT: retl37 %b = sext i1 %a to i838 ret i8 %b39}40 41define i16 @select_i16_neg1_or_0(i1 %a) {42; X64-LABEL: select_i16_neg1_or_0:43; X64: # %bb.0:44; X64-NEXT: movl %edi, %eax45; X64-NEXT: andl $1, %eax46; X64-NEXT: negl %eax47; X64-NEXT: # kill: def $ax killed $ax killed $eax48; X64-NEXT: retq49;50; X32-LABEL: select_i16_neg1_or_0:51; X32: # %bb.0:52; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax53; X32-NEXT: andl $1, %eax54; X32-NEXT: negl %eax55; X32-NEXT: # kill: def $ax killed $ax killed $eax56; X32-NEXT: retl57 %b = sext i1 %a to i1658 ret i16 %b59}60 61define i16 @select_i16_neg1_or_0_zeroext(i1 zeroext %a) {62; X64-LABEL: select_i16_neg1_or_0_zeroext:63; X64: # %bb.0:64; X64-NEXT: movl %edi, %eax65; X64-NEXT: negl %eax66; X64-NEXT: # kill: def $ax killed $ax killed $eax67; X64-NEXT: retq68;69; X32-LABEL: select_i16_neg1_or_0_zeroext:70; X32: # %bb.0:71; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax72; X32-NEXT: negl %eax73; X32-NEXT: # kill: def $ax killed $ax killed $eax74; X32-NEXT: retl75 %b = sext i1 %a to i1676 ret i16 %b77}78 79define i32 @select_i32_neg1_or_0(i1 %a) {80; X64-LABEL: select_i32_neg1_or_0:81; X64: # %bb.0:82; X64-NEXT: movl %edi, %eax83; X64-NEXT: andl $1, %eax84; X64-NEXT: negl %eax85; X64-NEXT: retq86;87; X32-LABEL: select_i32_neg1_or_0:88; X32: # %bb.0:89; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax90; X32-NEXT: andl $1, %eax91; X32-NEXT: negl %eax92; X32-NEXT: retl93 %b = sext i1 %a to i3294 ret i32 %b95}96 97define i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) {98; X64-LABEL: select_i32_neg1_or_0_zeroext:99; X64: # %bb.0:100; X64-NEXT: movl %edi, %eax101; X64-NEXT: negl %eax102; X64-NEXT: retq103;104; X32-LABEL: select_i32_neg1_or_0_zeroext:105; X32: # %bb.0:106; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax107; X32-NEXT: negl %eax108; X32-NEXT: retl109 %b = sext i1 %a to i32110 ret i32 %b111}112 113define i64 @select_i64_neg1_or_0(i1 %a) {114; X64-LABEL: select_i64_neg1_or_0:115; X64: # %bb.0:116; X64-NEXT: movl %edi, %eax117; X64-NEXT: andl $1, %eax118; X64-NEXT: negq %rax119; X64-NEXT: retq120;121; X32-LABEL: select_i64_neg1_or_0:122; X32: # %bb.0:123; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax124; X32-NEXT: andl $1, %eax125; X32-NEXT: negl %eax126; X32-NEXT: movl %eax, %edx127; X32-NEXT: retl128 %b = sext i1 %a to i64129 ret i64 %b130}131 132define i64 @select_i64_neg1_or_0_zeroext(i1 zeroext %a) {133; X64-LABEL: select_i64_neg1_or_0_zeroext:134; X64: # %bb.0:135; X64-NEXT: movl %edi, %eax136; X64-NEXT: negq %rax137; X64-NEXT: retq138;139; X32-LABEL: select_i64_neg1_or_0_zeroext:140; X32: # %bb.0:141; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax142; X32-NEXT: negl %eax143; X32-NEXT: movl %eax, %edx144; X32-NEXT: retl145 %b = sext i1 %a to i64146 ret i64 %b147}148 149