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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE3; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefixes=X86,X86-AVX4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefixes=X64,X64-AVX6 7define i32 @f(<4 x float> %A, ptr %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4 x i32> %F, <8 x i16> %G, <16 x i8> %H, i64 %I, ptr %loadptr) nounwind {8; X86-SSE-LABEL: f:9; X86-SSE: # %bb.0:10; X86-SSE-NEXT: pushl %ebp11; X86-SSE-NEXT: movl %esp, %ebp12; X86-SSE-NEXT: pushl %esi13; X86-SSE-NEXT: andl $-16, %esp14; X86-SSE-NEXT: subl $16, %esp15; X86-SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero16; X86-SSE-NEXT: movl 12(%ebp), %ecx17; X86-SSE-NEXT: movdqa 56(%ebp), %xmm418; X86-SSE-NEXT: movdqa 40(%ebp), %xmm519; X86-SSE-NEXT: movdqa 24(%ebp), %xmm620; X86-SSE-NEXT: movl 8(%ebp), %esi21; X86-SSE-NEXT: movl 80(%ebp), %edx22; X86-SSE-NEXT: movl (%edx), %eax23; X86-SSE-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm024; X86-SSE-NEXT: movntps %xmm0, (%esi)25; X86-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm226; X86-SSE-NEXT: addl (%edx), %eax27; X86-SSE-NEXT: movntdq %xmm2, (%esi)28; X86-SSE-NEXT: addpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm129; X86-SSE-NEXT: addl (%edx), %eax30; X86-SSE-NEXT: movntpd %xmm1, (%esi)31; X86-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm632; X86-SSE-NEXT: addl (%edx), %eax33; X86-SSE-NEXT: movntdq %xmm6, (%esi)34; X86-SSE-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm535; X86-SSE-NEXT: addl (%edx), %eax36; X86-SSE-NEXT: movntdq %xmm5, (%esi)37; X86-SSE-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}, %xmm438; X86-SSE-NEXT: addl (%edx), %eax39; X86-SSE-NEXT: movntdq %xmm4, (%esi)40; X86-SSE-NEXT: addl (%edx), %eax41; X86-SSE-NEXT: movntil %ecx, (%esi)42; X86-SSE-NEXT: addl (%edx), %eax43; X86-SSE-NEXT: movsd %xmm3, (%esi)44; X86-SSE-NEXT: addl (%edx), %eax45; X86-SSE-NEXT: leal -4(%ebp), %esp46; X86-SSE-NEXT: popl %esi47; X86-SSE-NEXT: popl %ebp48; X86-SSE-NEXT: retl49;50; X86-AVX-LABEL: f:51; X86-AVX: # %bb.0:52; X86-AVX-NEXT: pushl %ebp53; X86-AVX-NEXT: movl %esp, %ebp54; X86-AVX-NEXT: pushl %esi55; X86-AVX-NEXT: andl $-16, %esp56; X86-AVX-NEXT: subl $16, %esp57; X86-AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero58; X86-AVX-NEXT: movl 12(%ebp), %ecx59; X86-AVX-NEXT: vmovdqa 56(%ebp), %xmm460; X86-AVX-NEXT: vmovdqa 40(%ebp), %xmm561; X86-AVX-NEXT: vmovdqa 24(%ebp), %xmm662; X86-AVX-NEXT: movl 8(%ebp), %esi63; X86-AVX-NEXT: movl 80(%ebp), %edx64; X86-AVX-NEXT: movl (%edx), %eax65; X86-AVX-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm066; X86-AVX-NEXT: vmovntps %xmm0, (%esi)67; X86-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2, %xmm068; X86-AVX-NEXT: addl (%edx), %eax69; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)70; X86-AVX-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm071; X86-AVX-NEXT: addl (%edx), %eax72; X86-AVX-NEXT: vmovntpd %xmm0, (%esi)73; X86-AVX-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm6, %xmm074; X86-AVX-NEXT: addl (%edx), %eax75; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)76; X86-AVX-NEXT: vpaddw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm5, %xmm077; X86-AVX-NEXT: addl (%edx), %eax78; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)79; X86-AVX-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}, %xmm4, %xmm080; X86-AVX-NEXT: addl (%edx), %eax81; X86-AVX-NEXT: vmovntdq %xmm0, (%esi)82; X86-AVX-NEXT: addl (%edx), %eax83; X86-AVX-NEXT: movntil %ecx, (%esi)84; X86-AVX-NEXT: addl (%edx), %eax85; X86-AVX-NEXT: vmovsd %xmm3, (%esi)86; X86-AVX-NEXT: addl (%edx), %eax87; X86-AVX-NEXT: leal -4(%ebp), %esp88; X86-AVX-NEXT: popl %esi89; X86-AVX-NEXT: popl %ebp90; X86-AVX-NEXT: retl91;92; X64-SSE-LABEL: f:93; X64-SSE: # %bb.0:94; X64-SSE-NEXT: movl (%rcx), %eax95; X64-SSE-NEXT: addps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm096; X64-SSE-NEXT: movntps %xmm0, (%rdi)97; X64-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm298; X64-SSE-NEXT: addl (%rcx), %eax99; X64-SSE-NEXT: movntdq %xmm2, (%rdi)100; X64-SSE-NEXT: addpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1101; X64-SSE-NEXT: addl (%rcx), %eax102; X64-SSE-NEXT: movntpd %xmm1, (%rdi)103; X64-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3104; X64-SSE-NEXT: addl (%rcx), %eax105; X64-SSE-NEXT: movntdq %xmm3, (%rdi)106; X64-SSE-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4107; X64-SSE-NEXT: addl (%rcx), %eax108; X64-SSE-NEXT: movntdq %xmm4, (%rdi)109; X64-SSE-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5110; X64-SSE-NEXT: addl (%rcx), %eax111; X64-SSE-NEXT: movntdq %xmm5, (%rdi)112; X64-SSE-NEXT: addl (%rcx), %eax113; X64-SSE-NEXT: movntil %esi, (%rdi)114; X64-SSE-NEXT: addl (%rcx), %eax115; X64-SSE-NEXT: movntiq %rdx, (%rdi)116; X64-SSE-NEXT: addl (%rcx), %eax117; X64-SSE-NEXT: retq118;119; X64-AVX-LABEL: f:120; X64-AVX: # %bb.0:121; X64-AVX-NEXT: movl (%rcx), %eax122; X64-AVX-NEXT: vaddps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0123; X64-AVX-NEXT: vmovntps %xmm0, (%rdi)124; X64-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0125; X64-AVX-NEXT: addl (%rcx), %eax126; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)127; X64-AVX-NEXT: vaddpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0128; X64-AVX-NEXT: addl (%rcx), %eax129; X64-AVX-NEXT: vmovntpd %xmm0, (%rdi)130; X64-AVX-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm0131; X64-AVX-NEXT: addl (%rcx), %eax132; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)133; X64-AVX-NEXT: vpaddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm0134; X64-AVX-NEXT: addl (%rcx), %eax135; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)136; X64-AVX-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5, %xmm0137; X64-AVX-NEXT: addl (%rcx), %eax138; X64-AVX-NEXT: vmovntdq %xmm0, (%rdi)139; X64-AVX-NEXT: addl (%rcx), %eax140; X64-AVX-NEXT: movntil %esi, (%rdi)141; X64-AVX-NEXT: addl (%rcx), %eax142; X64-AVX-NEXT: movntiq %rdx, (%rdi)143; X64-AVX-NEXT: addl (%rcx), %eax144; X64-AVX-NEXT: retq145 %v0 = load i32, ptr %loadptr, align 1146 %A2 = fadd <4 x float> %A, <float 1.0, float 2.0, float 3.0, float 4.0>147 store <4 x float> %A2, ptr %B, align 16, !nontemporal !0148 %v1 = load i32, ptr %loadptr, align 1149 %E2 = add <2 x i64> %E, <i64 1, i64 2>150 store <2 x i64> %E2, ptr %B, align 16, !nontemporal !0151 %v2 = load i32, ptr %loadptr, align 1152 %C2 = fadd <2 x double> %C, <double 1.0, double 2.0>153 store <2 x double> %C2, ptr %B, align 16, !nontemporal !0154 %v3 = load i32, ptr %loadptr, align 1155 %F2 = add <4 x i32> %F, <i32 1, i32 2, i32 3, i32 4>156 store <4 x i32> %F2, ptr %B, align 16, !nontemporal !0157 %v4 = load i32, ptr %loadptr, align 1158 %G2 = add <8 x i16> %G, <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>159 store <8 x i16> %G2, ptr %B, align 16, !nontemporal !0160 %v5 = load i32, ptr %loadptr, align 1161 %H2 = add <16 x i8> %H, <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>162 store <16 x i8> %H2, ptr %B, align 16, !nontemporal !0163 %v6 = load i32, ptr %loadptr, align 1164 store i32 %D, ptr %B, align 1, !nontemporal !0165 %v7 = load i32, ptr %loadptr, align 1166 store i64 %I, ptr %B, align 1, !nontemporal !0167 %v8 = load i32, ptr %loadptr, align 1168 %sum1 = add i32 %v0, %v1169 %sum2 = add i32 %sum1, %v2170 %sum3 = add i32 %sum2, %v3171 %sum4 = add i32 %sum3, %v4172 %sum5 = add i32 %sum4, %v5173 %sum6 = add i32 %sum5, %v6174 %sum7 = add i32 %sum6, %v7175 %sum8 = add i32 %sum7, %v8176 ret i32 %sum8177}178 179define void @test_mmx(ptr nocapture %a0, ptr nocapture %a1) {180; X86-LABEL: test_mmx:181; X86: # %bb.0: # %entry182; X86-NEXT: movl {{[0-9]+}}(%esp), %eax183; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx184; X86-NEXT: movq (%ecx), %mm0185; X86-NEXT: psrlq $3, %mm0186; X86-NEXT: movntq %mm0, (%eax)187; X86-NEXT: retl188;189; X64-LABEL: test_mmx:190; X64: # %bb.0: # %entry191; X64-NEXT: movq (%rdi), %mm0192; X64-NEXT: psrlq $3, %mm0193; X64-NEXT: movntq %mm0, (%rsi)194; X64-NEXT: retq195entry:196 %0 = load <1 x i64>, ptr %a0197 %1 = call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %0, i32 3)198 store <1 x i64> %1, ptr %a1, align 8, !nontemporal !0199 ret void200}201declare <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64>, i32) nounwind readnone202 203!0 = !{i32 1}204