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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X863; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X644 5; Fold6; ~(X - 1)7; To8; - X9;10; This needs to be a backend-level fold because only by now pointers11; are just registers; in middle-end IR this can only be done via @llvm.ptrmask()12; intrinsic which is not sufficiently widely-spread yet.13;14; https://bugs.llvm.org/show_bug.cgi?id=4444815 16; The basic positive tests17 18define i32 @t0_32(i32 %alignment) nounwind {19; X86-LABEL: t0_32:20; X86: # %bb.0:21; X86-NEXT: xorl %eax, %eax22; X86-NEXT: subl {{[0-9]+}}(%esp), %eax23; X86-NEXT: retl24;25; X64-LABEL: t0_32:26; X64: # %bb.0:27; X64-NEXT: movl %edi, %eax28; X64-NEXT: negl %eax29; X64-NEXT: retq30 %mask = add i32 %alignment, -131 %invmask = xor i32 %mask, -132 ret i32 %invmask33}34define i64 @t1_64(i64 %alignment) nounwind {35; X86-LABEL: t1_64:36; X86: # %bb.0:37; X86-NEXT: xorl %edx, %edx38; X86-NEXT: xorl %eax, %eax39; X86-NEXT: subl {{[0-9]+}}(%esp), %eax40; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx41; X86-NEXT: retl42;43; X64-LABEL: t1_64:44; X64: # %bb.0:45; X64-NEXT: movq %rdi, %rax46; X64-NEXT: negq %rax47; X64-NEXT: retq48 %mask = add i64 %alignment, -149 %invmask = xor i64 %mask, -150 ret i64 %invmask51}52 53; Extra use test54 55define i32 @t2_extrause(i32 %alignment, ptr %mask_storage) nounwind {56; X86-LABEL: t2_extrause:57; X86: # %bb.0:58; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx59; X86-NEXT: movl {{[0-9]+}}(%esp), %eax60; X86-NEXT: decl %eax61; X86-NEXT: movl %eax, (%ecx)62; X86-NEXT: notl %eax63; X86-NEXT: retl64;65; X64-LABEL: t2_extrause:66; X64: # %bb.0:67; X64-NEXT: # kill: def $edi killed $edi def $rdi68; X64-NEXT: leal -1(%rdi), %eax69; X64-NEXT: movl %eax, (%rsi)70; X64-NEXT: notl %eax71; X64-NEXT: retq72 %mask = add i32 %alignment, -173 store i32 %mask, ptr %mask_storage74 %invmask = xor i32 %mask, -175 ret i32 %invmask76}77 78; Negative tests79 80define i32 @n3_not_dec(i32 %alignment) nounwind {81; X86-LABEL: n3_not_dec:82; X86: # %bb.0:83; X86-NEXT: movl {{[0-9]+}}(%esp), %eax84; X86-NEXT: incl %eax85; X86-NEXT: notl %eax86; X86-NEXT: retl87;88; X64-LABEL: n3_not_dec:89; X64: # %bb.0:90; X64-NEXT: # kill: def $edi killed $edi def $rdi91; X64-NEXT: leal 1(%rdi), %eax92; X64-NEXT: notl %eax93; X64-NEXT: retq94 %mask = add i32 %alignment, 1 ; not -195 %invmask = xor i32 %mask, -196 ret i32 %invmask97}98 99define i32 @n4_not_not(i32 %alignment) nounwind {100; X86-LABEL: n4_not_not:101; X86: # %bb.0:102; X86-NEXT: movl {{[0-9]+}}(%esp), %eax103; X86-NEXT: decl %eax104; X86-NEXT: xorl $1, %eax105; X86-NEXT: retl106;107; X64-LABEL: n4_not_not:108; X64: # %bb.0:109; X64-NEXT: # kill: def $edi killed $edi def $rdi110; X64-NEXT: leal -1(%rdi), %eax111; X64-NEXT: xorl $1, %eax112; X64-NEXT: retq113 %mask = add i32 %alignment, -1114 %invmask = xor i32 %mask, 1 ; not -1115 ret i32 %invmask116}117