364 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE23; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE424; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX15; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX26; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX27; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX28; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f | FileCheck %s --check-prefix=AVX5129; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX51210; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX51211; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+xop | FileCheck %s --check-prefixes=AVX,XOP12 13define void @insert_v7i8_v2i16_2(ptr%a0, ptr%a1) nounwind {14; SSE-LABEL: insert_v7i8_v2i16_2:15; SSE: # %bb.0:16; SSE-NEXT: movl (%rsi), %eax17; SSE-NEXT: movd %eax, %xmm018; SSE-NEXT: movq (%rdi), %rcx19; SSE-NEXT: movq %rcx, %xmm120; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]21; SSE-NEXT: shrq $48, %rcx22; SSE-NEXT: movb %cl, 6(%rdi)23; SSE-NEXT: shrl $16, %eax24; SSE-NEXT: movw %ax, 4(%rdi)25; SSE-NEXT: movd %xmm1, (%rdi)26; SSE-NEXT: retq27;28; AVX-LABEL: insert_v7i8_v2i16_2:29; AVX: # %bb.0:30; AVX-NEXT: movl (%rsi), %eax31; AVX-NEXT: vmovd %eax, %xmm032; AVX-NEXT: movq (%rdi), %rcx33; AVX-NEXT: vmovq %rcx, %xmm134; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]35; AVX-NEXT: shrq $48, %rcx36; AVX-NEXT: movb %cl, 6(%rdi)37; AVX-NEXT: shrl $16, %eax38; AVX-NEXT: movw %ax, 4(%rdi)39; AVX-NEXT: vmovd %xmm0, (%rdi)40; AVX-NEXT: retq41;42; AVX512-LABEL: insert_v7i8_v2i16_2:43; AVX512: # %bb.0:44; AVX512-NEXT: movl (%rsi), %eax45; AVX512-NEXT: vmovd %eax, %xmm046; AVX512-NEXT: movq (%rdi), %rcx47; AVX512-NEXT: vmovq %rcx, %xmm148; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]49; AVX512-NEXT: shrq $48, %rcx50; AVX512-NEXT: movb %cl, 6(%rdi)51; AVX512-NEXT: shrl $16, %eax52; AVX512-NEXT: movw %ax, 4(%rdi)53; AVX512-NEXT: vmovd %xmm0, (%rdi)54; AVX512-NEXT: retq55 %1 = load <2 x i16>, ptr%a156 %2 = bitcast <2 x i16> %1 to <4 x i8>57 %3 = shufflevector <4 x i8> %2, <4 x i8> undef, <7 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef>58 %4 = load <7 x i8>, ptr%a059 %5 = shufflevector <7 x i8> %4, <7 x i8> %3, <7 x i32> <i32 0, i32 1, i32 7, i32 8, i32 9, i32 10, i32 6>60 store <7 x i8> %5, ptr %a061 ret void62}63 64%struct.Mat4 = type { %struct.storage }65%struct.storage = type { [16 x float] }66 67define void @PR40815(ptr nocapture readonly dereferenceable(64), ptr nocapture dereferenceable(64)) {68; SSE-LABEL: PR40815:69; SSE: # %bb.0:70; SSE-NEXT: movaps (%rdi), %xmm071; SSE-NEXT: movaps 16(%rdi), %xmm172; SSE-NEXT: movaps 32(%rdi), %xmm273; SSE-NEXT: movaps 48(%rdi), %xmm374; SSE-NEXT: movaps %xmm3, (%rsi)75; SSE-NEXT: movaps %xmm2, 16(%rsi)76; SSE-NEXT: movaps %xmm1, 32(%rsi)77; SSE-NEXT: movaps %xmm0, 48(%rsi)78; SSE-NEXT: retq79;80; AVX-LABEL: PR40815:81; AVX: # %bb.0:82; AVX-NEXT: vmovaps (%rdi), %xmm083; AVX-NEXT: vmovaps 16(%rdi), %xmm184; AVX-NEXT: vmovaps 32(%rdi), %xmm285; AVX-NEXT: vmovaps 48(%rdi), %xmm386; AVX-NEXT: vmovaps %xmm2, 16(%rsi)87; AVX-NEXT: vmovaps %xmm3, (%rsi)88; AVX-NEXT: vmovaps %xmm0, 48(%rsi)89; AVX-NEXT: vmovaps %xmm1, 32(%rsi)90; AVX-NEXT: retq91;92; AVX512-LABEL: PR40815:93; AVX512: # %bb.0:94; AVX512-NEXT: vmovaps 48(%rdi), %xmm095; AVX512-NEXT: vmovups 16(%rdi), %ymm196; AVX512-NEXT: vinsertf128 $1, (%rdi), %ymm1, %ymm197; AVX512-NEXT: vinsertf128 $1, 32(%rdi), %ymm0, %ymm098; AVX512-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm099; AVX512-NEXT: vmovups %zmm0, (%rsi)100; AVX512-NEXT: vzeroupper101; AVX512-NEXT: retq102 %3 = load <16 x float>, ptr %0, align 64103 %4 = shufflevector <16 x float> %3, <16 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>104 %5 = getelementptr inbounds %struct.Mat4, ptr %1, i64 0, i32 0, i32 0, i64 4105 %6 = bitcast <16 x float> %3 to <4 x i128>106 %7 = extractelement <4 x i128> %6, i32 1107 %8 = getelementptr inbounds %struct.Mat4, ptr %1, i64 0, i32 0, i32 0, i64 8108 %9 = bitcast <16 x float> %3 to <4 x i128>109 %10 = extractelement <4 x i128> %9, i32 2110 %11 = getelementptr inbounds %struct.Mat4, ptr %1, i64 0, i32 0, i32 0, i64 12111 %12 = bitcast <16 x float> %3 to <4 x i128>112 %13 = extractelement <4 x i128> %12, i32 3113 store i128 %13, ptr %1, align 16114 store i128 %10, ptr %5, align 16115 store i128 %7, ptr %8, align 16116 store <4 x float> %4, ptr %11, align 16117 ret void118}119 120define <16 x i32> @PR42819(ptr %a0) {121; SSE-LABEL: PR42819:122; SSE: # %bb.0:123; SSE-NEXT: movdqu (%rdi), %xmm3124; SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7,8,9,10,11]125; SSE-NEXT: xorps %xmm0, %xmm0126; SSE-NEXT: xorps %xmm1, %xmm1127; SSE-NEXT: xorps %xmm2, %xmm2128; SSE-NEXT: retq129;130; AVX-LABEL: PR42819:131; AVX: # %bb.0:132; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,0,1,2]133; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0134; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1135; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4],ymm0[5,6,7]136; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0137; AVX-NEXT: retq138;139; AVX512-LABEL: PR42819:140; AVX512: # %bb.0:141; AVX512-NEXT: vmovdqu (%rdi), %ymm0142; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1143; AVX512-NEXT: valignd {{.*#+}} zmm0 = zmm1[3,4,5,6,7,8,9,10,11,12,13,14,15],zmm0[0,1,2]144; AVX512-NEXT: retq145 %1 = load <8 x i32>, ptr %a0, align 4146 %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>147 %3 = shufflevector <16 x i32> zeroinitializer, <16 x i32> %2, <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18>148 ret <16 x i32> %3149}150 151@b = dso_local local_unnamed_addr global i32 0, align 4152@c = dso_local local_unnamed_addr global [49 x i32] zeroinitializer, align 16153@d = dso_local local_unnamed_addr global [49 x i32] zeroinitializer, align 16154 155define void @PR42833() {156; SSE2-LABEL: PR42833:157; SSE2: # %bb.0:158; SSE2-NEXT: movl b(%rip), %eax159; SSE2-NEXT: movdqa c+144(%rip), %xmm2160; SSE2-NEXT: movdqa c+128(%rip), %xmm0161; SSE2-NEXT: addl c+128(%rip), %eax162; SSE2-NEXT: movd %eax, %xmm1163; SSE2-NEXT: movd %eax, %xmm3164; SSE2-NEXT: paddd %xmm0, %xmm3165; SSE2-NEXT: movdqa d+144(%rip), %xmm4166; SSE2-NEXT: psubd %xmm2, %xmm4167; SSE2-NEXT: paddd %xmm2, %xmm2168; SSE2-NEXT: movdqa %xmm0, %xmm5169; SSE2-NEXT: paddd %xmm5, %xmm5170; SSE2-NEXT: movss {{.*#+}} xmm5 = xmm3[0],xmm5[1,2,3]171; SSE2-NEXT: movdqa %xmm2, c+144(%rip)172; SSE2-NEXT: movaps %xmm5, c+128(%rip)173; SSE2-NEXT: movdqa c+160(%rip), %xmm2174; SSE2-NEXT: movdqa c+176(%rip), %xmm3175; SSE2-NEXT: movdqa d+160(%rip), %xmm5176; SSE2-NEXT: movdqa d+176(%rip), %xmm6177; SSE2-NEXT: movdqa d+128(%rip), %xmm7178; SSE2-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]179; SSE2-NEXT: psubd %xmm0, %xmm7180; SSE2-NEXT: psubd %xmm3, %xmm6181; SSE2-NEXT: psubd %xmm2, %xmm5182; SSE2-NEXT: movdqa %xmm5, d+160(%rip)183; SSE2-NEXT: movdqa %xmm6, d+176(%rip)184; SSE2-NEXT: movdqa %xmm4, d+144(%rip)185; SSE2-NEXT: movdqa %xmm7, d+128(%rip)186; SSE2-NEXT: paddd %xmm3, %xmm3187; SSE2-NEXT: paddd %xmm2, %xmm2188; SSE2-NEXT: movdqa %xmm2, c+160(%rip)189; SSE2-NEXT: movdqa %xmm3, c+176(%rip)190; SSE2-NEXT: retq191;192; SSE42-LABEL: PR42833:193; SSE42: # %bb.0:194; SSE42-NEXT: movl b(%rip), %eax195; SSE42-NEXT: movdqa c+144(%rip), %xmm1196; SSE42-NEXT: movdqa c+128(%rip), %xmm0197; SSE42-NEXT: addl c+128(%rip), %eax198; SSE42-NEXT: movd %eax, %xmm2199; SSE42-NEXT: paddd %xmm0, %xmm2200; SSE42-NEXT: movdqa d+144(%rip), %xmm3201; SSE42-NEXT: psubd %xmm1, %xmm3202; SSE42-NEXT: paddd %xmm1, %xmm1203; SSE42-NEXT: movdqa %xmm0, %xmm4204; SSE42-NEXT: paddd %xmm4, %xmm4205; SSE42-NEXT: pblendw {{.*#+}} xmm4 = xmm2[0,1],xmm4[2,3,4,5,6,7]206; SSE42-NEXT: movdqa %xmm1, c+144(%rip)207; SSE42-NEXT: movdqa %xmm4, c+128(%rip)208; SSE42-NEXT: movdqa c+160(%rip), %xmm1209; SSE42-NEXT: movdqa c+176(%rip), %xmm2210; SSE42-NEXT: movdqa d+160(%rip), %xmm4211; SSE42-NEXT: movdqa d+176(%rip), %xmm5212; SSE42-NEXT: movdqa d+128(%rip), %xmm6213; SSE42-NEXT: pinsrd $0, %eax, %xmm0214; SSE42-NEXT: psubd %xmm0, %xmm6215; SSE42-NEXT: psubd %xmm2, %xmm5216; SSE42-NEXT: psubd %xmm1, %xmm4217; SSE42-NEXT: movdqa %xmm4, d+160(%rip)218; SSE42-NEXT: movdqa %xmm5, d+176(%rip)219; SSE42-NEXT: movdqa %xmm3, d+144(%rip)220; SSE42-NEXT: movdqa %xmm6, d+128(%rip)221; SSE42-NEXT: paddd %xmm2, %xmm2222; SSE42-NEXT: paddd %xmm1, %xmm1223; SSE42-NEXT: movdqa %xmm1, c+160(%rip)224; SSE42-NEXT: movdqa %xmm2, c+176(%rip)225; SSE42-NEXT: retq226;227; AVX1-LABEL: PR42833:228; AVX1: # %bb.0:229; AVX1-NEXT: movl b(%rip), %eax230; AVX1-NEXT: addl c+128(%rip), %eax231; AVX1-NEXT: vmovd %eax, %xmm0232; AVX1-NEXT: vmovdqa c+128(%rip), %xmm1233; AVX1-NEXT: vpaddd %xmm0, %xmm1, %xmm0234; AVX1-NEXT: vpaddd %xmm1, %xmm1, %xmm2235; AVX1-NEXT: vmovdqa c+144(%rip), %xmm3236; AVX1-NEXT: vpaddd %xmm3, %xmm3, %xmm3237; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2238; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3,4,5,6,7]239; AVX1-NEXT: vmovdqa d+144(%rip), %xmm2240; AVX1-NEXT: vpsubd c+144(%rip), %xmm2, %xmm2241; AVX1-NEXT: vmovups %ymm0, c+128(%rip)242; AVX1-NEXT: vpinsrd $0, %eax, %xmm1, %xmm0243; AVX1-NEXT: vmovdqa d+128(%rip), %xmm1244; AVX1-NEXT: vpsubd %xmm0, %xmm1, %xmm0245; AVX1-NEXT: vmovdqa d+176(%rip), %xmm1246; AVX1-NEXT: vmovdqa c+176(%rip), %xmm3247; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm1248; AVX1-NEXT: vmovdqa d+160(%rip), %xmm4249; AVX1-NEXT: vmovdqa c+160(%rip), %xmm5250; AVX1-NEXT: vpsubd %xmm5, %xmm4, %xmm4251; AVX1-NEXT: vmovdqa %xmm2, d+144(%rip)252; AVX1-NEXT: vmovdqa %xmm4, d+160(%rip)253; AVX1-NEXT: vmovdqa %xmm1, d+176(%rip)254; AVX1-NEXT: vmovdqa %xmm0, d+128(%rip)255; AVX1-NEXT: vpaddd %xmm3, %xmm3, %xmm0256; AVX1-NEXT: vpaddd %xmm5, %xmm5, %xmm1257; AVX1-NEXT: vmovdqa %xmm1, c+160(%rip)258; AVX1-NEXT: vmovdqa %xmm0, c+176(%rip)259; AVX1-NEXT: vzeroupper260; AVX1-NEXT: retq261;262; AVX2-LABEL: PR42833:263; AVX2: # %bb.0:264; AVX2-NEXT: vmovdqu c+128(%rip), %ymm0265; AVX2-NEXT: vmovd %xmm0, %eax266; AVX2-NEXT: addl b(%rip), %eax267; AVX2-NEXT: vmovd %eax, %xmm1268; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm2269; AVX2-NEXT: vpaddd %ymm0, %ymm0, %ymm3270; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm3[1,2,3,4,5,6,7]271; AVX2-NEXT: vmovdqu %ymm2, c+128(%rip)272; AVX2-NEXT: vmovdqu c+160(%rip), %ymm2273; AVX2-NEXT: vmovdqu d+160(%rip), %ymm3274; AVX2-NEXT: vmovdqu d+128(%rip), %ymm4275; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3,4,5,6,7]276; AVX2-NEXT: vpsubd %ymm0, %ymm4, %ymm0277; AVX2-NEXT: vpsubd %ymm2, %ymm3, %ymm1278; AVX2-NEXT: vmovdqu %ymm1, d+160(%rip)279; AVX2-NEXT: vmovdqu %ymm0, d+128(%rip)280; AVX2-NEXT: vpaddd %ymm2, %ymm2, %ymm0281; AVX2-NEXT: vmovdqu %ymm0, c+160(%rip)282; AVX2-NEXT: vzeroupper283; AVX2-NEXT: retq284;285; AVX512-LABEL: PR42833:286; AVX512: # %bb.0:287; AVX512-NEXT: vmovdqu c+128(%rip), %ymm0288; AVX512-NEXT: vmovdqu64 c+128(%rip), %zmm1289; AVX512-NEXT: vmovd %xmm0, %eax290; AVX512-NEXT: addl b(%rip), %eax291; AVX512-NEXT: vmovd %eax, %xmm2292; AVX512-NEXT: vpaddd %ymm2, %ymm0, %ymm2293; AVX512-NEXT: vpaddd %ymm0, %ymm0, %ymm0294; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0],ymm0[1,2,3,4,5,6,7]295; AVX512-NEXT: vmovdqa c+128(%rip), %xmm2296; AVX512-NEXT: vmovdqu %ymm0, c+128(%rip)297; AVX512-NEXT: vmovdqu c+160(%rip), %ymm0298; AVX512-NEXT: vmovdqu64 d+128(%rip), %zmm3299; AVX512-NEXT: vpinsrd $0, %eax, %xmm2, %xmm2300; AVX512-NEXT: vinserti32x4 $0, %xmm2, %zmm1, %zmm1301; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm1302; AVX512-NEXT: vpsubd %zmm1, %zmm3, %zmm1303; AVX512-NEXT: vmovdqu64 %zmm1, d+128(%rip)304; AVX512-NEXT: vpaddd %ymm0, %ymm0, %ymm0305; AVX512-NEXT: vmovdqu %ymm0, c+160(%rip)306; AVX512-NEXT: vzeroupper307; AVX512-NEXT: retq308;309; XOP-LABEL: PR42833:310; XOP: # %bb.0:311; XOP-NEXT: movl b(%rip), %eax312; XOP-NEXT: addl c+128(%rip), %eax313; XOP-NEXT: vmovd %eax, %xmm0314; XOP-NEXT: vmovdqa c+128(%rip), %xmm1315; XOP-NEXT: vpaddd %xmm0, %xmm1, %xmm0316; XOP-NEXT: vpaddd %xmm1, %xmm1, %xmm2317; XOP-NEXT: vmovdqa c+144(%rip), %xmm3318; XOP-NEXT: vpaddd %xmm3, %xmm3, %xmm3319; XOP-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2320; XOP-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3,4,5,6,7]321; XOP-NEXT: vmovdqa d+144(%rip), %xmm2322; XOP-NEXT: vpsubd c+144(%rip), %xmm2, %xmm2323; XOP-NEXT: vmovups %ymm0, c+128(%rip)324; XOP-NEXT: vpinsrd $0, %eax, %xmm1, %xmm0325; XOP-NEXT: vmovdqa d+128(%rip), %xmm1326; XOP-NEXT: vpsubd %xmm0, %xmm1, %xmm0327; XOP-NEXT: vmovdqa d+176(%rip), %xmm1328; XOP-NEXT: vmovdqa c+176(%rip), %xmm3329; XOP-NEXT: vpsubd %xmm3, %xmm1, %xmm1330; XOP-NEXT: vmovdqa d+160(%rip), %xmm4331; XOP-NEXT: vmovdqa c+160(%rip), %xmm5332; XOP-NEXT: vpsubd %xmm5, %xmm4, %xmm4333; XOP-NEXT: vmovdqa %xmm2, d+144(%rip)334; XOP-NEXT: vmovdqa %xmm4, d+160(%rip)335; XOP-NEXT: vmovdqa %xmm1, d+176(%rip)336; XOP-NEXT: vmovdqa %xmm0, d+128(%rip)337; XOP-NEXT: vpaddd %xmm3, %xmm3, %xmm0338; XOP-NEXT: vpaddd %xmm5, %xmm5, %xmm1339; XOP-NEXT: vmovdqa %xmm1, c+160(%rip)340; XOP-NEXT: vmovdqa %xmm0, c+176(%rip)341; XOP-NEXT: vzeroupper342; XOP-NEXT: retq343 %1 = load i32, ptr @b, align 4344 %2 = load <8 x i32>, ptr getelementptr inbounds ([49 x i32], ptr @c, i64 0, i64 32), align 16345 %3 = shufflevector <8 x i32> %2, <8 x i32> undef, <16 x i32> <i32 undef, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>346 %4 = extractelement <8 x i32> %2, i32 0347 %5 = add i32 %1, %4348 %6 = insertelement <8 x i32> <i32 undef, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, i32 %5, i32 0349 %7 = add <8 x i32> %2, %6350 %8 = shl <8 x i32> %2, %6351 %9 = shufflevector <8 x i32> %7, <8 x i32> %8, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>352 store <8 x i32> %9, ptr getelementptr inbounds ([49 x i32], ptr @c, i64 0, i64 32), align 16353 %10 = load <8 x i32>, ptr getelementptr inbounds ([49 x i32], ptr @c, i64 0, i64 40), align 16354 %11 = shufflevector <8 x i32> %10, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>355 %12 = load <16 x i32>, ptr getelementptr inbounds ([49 x i32], ptr @d, i64 0, i64 32), align 16356 %13 = insertelement <16 x i32> %3, i32 %5, i32 0357 %14 = shufflevector <16 x i32> %13, <16 x i32> %11, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>358 %15 = sub <16 x i32> %12, %14359 store <16 x i32> %15, ptr getelementptr inbounds ([49 x i32], ptr @d, i64 0, i64 32), align 16360 %16 = shl <8 x i32> %10, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>361 store <8 x i32> %16, ptr getelementptr inbounds ([49 x i32], ptr @c, i64 0, i64 40), align 16362 ret void363}364