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1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each2; pass. Ignore it with 'grep -v'.3; RUN: llc -mtriple=x86_64-- -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 \4; RUN: | grep -v 'Verify generated machine code' | FileCheck %s5; RUN: llc -mtriple=x86_64-- -O2 -debug-pass=Structure < %s -o /dev/null 2>&1 \6; RUN: | grep -v 'Verify generated machine code' | FileCheck %s7; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \8; RUN: | grep -v 'Verify generated machine code' | FileCheck %s9; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \10; RUN: | FileCheck %s --check-prefix=FPM11 12; REQUIRES: asserts13 14; CHECK-LABEL: Pass Arguments:15; CHECK-NEXT: Target Library Information16; CHECK-NEXT: Target Pass Configuration17; CHECK-NEXT: Machine Module Information18; CHECK-NEXT: Target Transform Information19; CHECK-NEXT: Assumption Cache Tracker20; CHECK-NEXT: Type-Based Alias Analysis21; CHECK-NEXT: Scoped NoAlias Alias Analysis22; CHECK-NEXT: Profile summary info23; CHECK-NEXT: Create Garbage Collector Module Metadata24; CHECK-NEXT: Machine Branch Probability Analysis25; CHECK-NEXT: Default Regalloc Eviction Advisor26; CHECK-NEXT: Default Regalloc Priority Advisor27; CHECK-NEXT: ModulePass Manager28; CHECK-NEXT: Pre-ISel Intrinsic Lowering29; CHECK-NEXT: FunctionPass Manager30; CHECK-NEXT: Expand large div/rem31; CHECK-NEXT: Expand fp32; CHECK-NEXT: Expand Atomic instructions33; CHECK-NEXT: Lower AMX intrinsics34; CHECK-NEXT: Lower AMX type for load/store35; CHECK-NEXT: Module Verifier36; CHECK-NEXT: Dominator Tree Construction37; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)38; CHECK-NEXT: Natural Loop Information39; CHECK-NEXT: Canonicalize natural loops40; CHECK-NEXT: Scalar Evolution Analysis41; CHECK-NEXT: Loop Pass Manager42; CHECK-NEXT: Canonicalize Freeze Instructions in Loops43; CHECK-NEXT: Induction Variable Users44; CHECK-NEXT: Loop Strength Reduction45; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)46; CHECK-NEXT: Function Alias Analysis Results47; CHECK-NEXT: Merge contiguous icmps into a memcmp48; CHECK-NEXT: Natural Loop Information49; CHECK-NEXT: Lazy Branch Probability Analysis50; CHECK-NEXT: Lazy Block Frequency Analysis51; CHECK-NEXT: Expand memcmp() to load/stores52; CHECK-NEXT: Lower Garbage Collection Instructions53; CHECK-NEXT: Shadow Stack GC Lowering54; CHECK-NEXT: Remove unreachable blocks from the CFG55; CHECK-NEXT: Natural Loop Information56; CHECK-NEXT: Post-Dominator Tree Construction57; CHECK-NEXT: Branch Probability Analysis58; CHECK-NEXT: Block Frequency Analysis59; CHECK-NEXT: Constant Hoisting60; CHECK-NEXT: Replace intrinsics with calls to vector library61; CHECK-NEXT: Lazy Branch Probability Analysis62; CHECK-NEXT: Lazy Block Frequency Analysis63; CHECK-NEXT: Optimization Remark Emitter64; CHECK-NEXT: Partially inline calls to library functions65; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)66; CHECK-NEXT: Scalarize Masked Memory Intrinsics67; CHECK-NEXT: Expand reduction intrinsics68; CHECK-NEXT: Interleaved Access Pass69; CHECK-NEXT: X86 Partial Reduction70; CHECK-NEXT: Expand indirectbr instructions71; CHECK-NEXT: Natural Loop Information72; CHECK-NEXT: CodeGen Prepare73; CHECK-NEXT: Dominator Tree Construction74; CHECK-NEXT: Exception handling preparation75; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)76; CHECK-NEXT: Function Alias Analysis Results77; CHECK-NEXT: ObjC ARC contraction78; CHECK-NEXT: Prepare callbr79; CHECK-NEXT: Safe Stack instrumentation pass80; CHECK-NEXT: Insert stack protectors81; CHECK-NEXT: Module Verifier82; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)83; CHECK-NEXT: Function Alias Analysis Results84; CHECK-NEXT: Natural Loop Information85; CHECK-NEXT: Post-Dominator Tree Construction86; CHECK-NEXT: Branch Probability Analysis87; CHECK-NEXT: Assignment Tracking Analysis88; CHECK-NEXT: Lazy Branch Probability Analysis89; CHECK-NEXT: Lazy Block Frequency Analysis90; CHECK-NEXT: X86 DAG->DAG Instruction Selection91; CHECK-NEXT: MachineDominator Tree Construction92; CHECK-NEXT: Local Dynamic TLS Access Clean-up93; CHECK-NEXT: X86 PIC Global Base Reg Initialization94; CHECK-NEXT: Argument Stack Rebase95; CHECK-NEXT: Finalize ISel and expand pseudo-instructions96; CHECK-NEXT: X86 Domain Reassignment Pass97; CHECK-NEXT: Lazy Machine Block Frequency Analysis98; CHECK-NEXT: Early Tail Duplication99; CHECK-NEXT: Optimize machine instruction PHIs100; CHECK-NEXT: Slot index numbering101; CHECK-NEXT: Merge disjoint stack slots102; CHECK-NEXT: Local Stack Slot Allocation103; CHECK-NEXT: Remove dead machine instructions104; CHECK-NEXT: MachineDominator Tree Construction105; CHECK-NEXT: Machine Natural Loop Construction106; CHECK-NEXT: Machine Trace Metrics107; CHECK-NEXT: Early If-Conversion108; CHECK-NEXT: Lazy Machine Block Frequency Analysis109; CHECK-NEXT: Machine InstCombiner110; CHECK-NEXT: X86 cmov Conversion111; CHECK-NEXT: MachineDominator Tree Construction112; CHECK-NEXT: Machine Natural Loop Construction113; CHECK-NEXT: Machine Block Frequency Analysis114; CHECK-NEXT: Early Machine Loop Invariant Code Motion115; CHECK-NEXT: MachineDominator Tree Construction116; CHECK-NEXT: Machine Block Frequency Analysis117; CHECK-NEXT: Machine Common Subexpression Elimination118; CHECK-NEXT: MachinePostDominator Tree Construction119; CHECK-NEXT: Machine Cycle Info Analysis120; CHECK-NEXT: Machine code sinking121; CHECK-NEXT: Peephole Optimizations122; CHECK-NEXT: Remove dead machine instructions123; CHECK-NEXT: Live Range Shrink124; CHECK-NEXT: X86 Fixup SetCC125; CHECK-NEXT: Lazy Machine Block Frequency Analysis126; CHECK-NEXT: X86 LEA Optimize127; CHECK-NEXT: X86 Optimize Call Frame128; CHECK-NEXT: X86 Avoid Store Forwarding Block129; CHECK-NEXT: X86 Suppress APX features for relocation130; CHECK-NEXT: X86 speculative load hardening131; CHECK-NEXT: X86 EFLAGS copy lowering132; CHECK-NEXT: X86 DynAlloca Expander133; CHECK-NEXT: MachineDominator Tree Construction134; CHECK-NEXT: Machine Natural Loop Construction135; CHECK-NEXT: Tile Register Pre-configure136; CHECK-NEXT: Detect Dead Lanes137; CHECK-NEXT: Init Undef Pass138; CHECK-NEXT: Process Implicit Definitions139; CHECK-NEXT: Remove unreachable machine basic blocks140; CHECK-NEXT: Live Variable Analysis141; CHECK-NEXT: Eliminate PHI nodes for register allocation142; CHECK-NEXT: Two-Address instruction pass143; CHECK-NEXT: Slot index numbering144; CHECK-NEXT: Live Interval Analysis145; CHECK-NEXT: Register Coalescer146; CHECK-NEXT: Rename Disconnected Subregister Components147; CHECK-NEXT: Machine Instruction Scheduler148; CHECK-NEXT: Machine Block Frequency Analysis149; CHECK-NEXT: Debug Variable Analysis150; CHECK-NEXT: Live Stack Slot Analysis151; CHECK-NEXT: Virtual Register Map152; CHECK-NEXT: Live Register Matrix153; CHECK-NEXT: Bundle Machine CFG Edges154; CHECK-NEXT: Spill Code Placement Analysis155; CHECK-NEXT: Lazy Machine Block Frequency Analysis156; CHECK-NEXT: Machine Optimization Remark Emitter157; CHECK-NEXT: Greedy Register Allocator158; CHECK-NEXT: Tile Register Configure159; CHECK-NEXT: Greedy Register Allocator160; CHECK-NEXT: Virtual Register Rewriter161; CHECK-NEXT: Register Allocation Pass Scoring162; CHECK-NEXT: Stack Slot Coloring163; CHECK-NEXT: Machine Copy Propagation Pass164; CHECK-NEXT: Machine Loop Invariant Code Motion165; CHECK-NEXT: X86 Lower Tile Copy166; CHECK-NEXT: Bundle Machine CFG Edges167; CHECK-NEXT: X86 FP Stackifier168; CHECK-NEXT: MachineDominator Tree Construction169; CHECK-NEXT: Machine Dominance Frontier Construction170; CHECK-NEXT: X86 Load Value Injection (LVI) Load Hardening171; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis172; CHECK-NEXT: Fixup Statepoint Caller Saved173; CHECK-NEXT: PostRA Machine Sink174; CHECK-NEXT: Machine Block Frequency Analysis175; CHECK-NEXT: MachinePostDominator Tree Construction176; CHECK-NEXT: Lazy Machine Block Frequency Analysis177; CHECK-NEXT: Machine Optimization Remark Emitter178; CHECK-NEXT: Shrink Wrapping analysis179; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization180; CHECK-NEXT: Machine Late Instructions Cleanup Pass181; CHECK-NEXT: Control Flow Optimizer182; CHECK-NEXT: Lazy Machine Block Frequency Analysis183; CHECK-NEXT: Tail Duplication184; CHECK-NEXT: Machine Copy Propagation Pass185; CHECK-NEXT: Post-RA pseudo instruction expansion pass186; CHECK-NEXT: X86 pseudo instruction expansion pass187; CHECK-NEXT: Insert KCFI indirect call checks188; CHECK-NEXT: MachineDominator Tree Construction189; CHECK-NEXT: Machine Natural Loop Construction190; CHECK-NEXT: Post RA top-down list latency scheduler191; CHECK-NEXT: Analyze Machine Code For Garbage Collection192; CHECK-NEXT: Machine Block Frequency Analysis193; CHECK-NEXT: MachinePostDominator Tree Construction194; CHECK-NEXT: Branch Probability Basic Block Placement195; CHECK-NEXT: Insert fentry calls196; CHECK-NEXT: Insert XRay ops197; CHECK-NEXT: Implement the 'patchable-function' attribute198; CHECK-NEXT: Reaching Definitions Analysis199; CHECK-NEXT: X86 Execution Dependency Fix200; CHECK-NEXT: BreakFalseDeps201; CHECK-NEXT: X86 Indirect Branch Tracking202; CHECK-NEXT: X86 vzeroupper inserter203; CHECK-NEXT: Lazy Machine Block Frequency Analysis204; CHECK-NEXT: X86 Byte/Word Instruction Fixup205; CHECK-NEXT: Lazy Machine Block Frequency Analysis206; CHECK-NEXT: X86 Atom pad short functions207; CHECK-NEXT: X86 LEA Fixup208; CHECK-NEXT: X86 Fixup Inst Tuning209; CHECK-NEXT: X86 Fixup Vector Constants210; CHECK-NEXT: Compressing EVEX instrs when possible211; CHECK-NEXT: X86 insert wait instruction212; CHECK-NEXT: Contiguously Lay Out Funclets213; CHECK-NEXT: Remove Loads Into Fake Uses214; CHECK-NEXT: StackMap Liveness Analysis215; CHECK-NEXT: Live DEBUG_VALUE analysis216; CHECK-NEXT: Machine Sanitizer Binary Metadata217; CHECK-NEXT: Lazy Machine Block Frequency Analysis218; CHECK-NEXT: Machine Optimization Remark Emitter219; CHECK-NEXT: Stack Frame Layout Analysis220; CHECK-NEXT: X86 Speculative Execution Side Effect Suppression221; CHECK-NEXT: X86 Indirect Thunks222; CHECK-NEXT: X86 Return Thunks223; CHECK-NEXT: Check CFA info and insert CFI instructions if needed224; CHECK-NEXT: X86 Load Value Injection (LVI) Ret-Hardening225; CHECK-NEXT: Pseudo Probe Inserter226; CHECK-NEXT: Unpack machine instruction bundles227; CHECK-NEXT: Lazy Machine Block Frequency Analysis228; CHECK-NEXT: Machine Optimization Remark Emitter229; CHECK-NEXT: X86 Assembly Printer230; CHECK-NEXT: Free MachineFunction231 232; We should only have one function pass manager.233; In the past, module passes have accidentally been added into the middle of234; the codegen pipeline, implicitly creating new function pass managers.235; FPM: FunctionPass Manager236; FPM-NOT: FunctionPass Manager237 238define void @f() {239 ret void240}241