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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X644 5;6; PR48768 - 'or' clears the overflow flag, so we don't need a separate 'test'.7;8 9define i8 @or_i8_ri(i8 zeroext %0, i8 zeroext %1) {10; X86-LABEL: or_i8_ri:11; X86: # %bb.0:12; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax13; X86-NEXT: movl %eax, %ecx14; X86-NEXT: orb $-17, %cl15; X86-NEXT: je .LBB0_216; X86-NEXT: # %bb.1:17; X86-NEXT: movl %ecx, %eax18; X86-NEXT: .LBB0_2:19; X86-NEXT: retl20;21; X64-LABEL: or_i8_ri:22; X64: # %bb.0:23; X64-NEXT: movl %edi, %eax24; X64-NEXT: orb $-17, %al25; X64-NEXT: movzbl %al, %eax26; X64-NEXT: cmovel %edi, %eax27; X64-NEXT: # kill: def $al killed $al killed $eax28; X64-NEXT: retq29 %3 = or i8 %0, -1730 %4 = icmp eq i8 %3, 031 %5 = select i1 %4, i8 %0, i8 %332 ret i8 %533}34 35define i8 @or_i8_rr(i8 zeroext %0, i8 zeroext %1) {36; X86-LABEL: or_i8_rr:37; X86: # %bb.0:38; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax39; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx40; X86-NEXT: orb %al, %cl41; X86-NEXT: je .LBB1_242; X86-NEXT: # %bb.1:43; X86-NEXT: movl %ecx, %eax44; X86-NEXT: .LBB1_2:45; X86-NEXT: retl46;47; X64-LABEL: or_i8_rr:48; X64: # %bb.0:49; X64-NEXT: movl %esi, %eax50; X64-NEXT: orl %edi, %eax51; X64-NEXT: cmovel %edi, %eax52; X64-NEXT: # kill: def $al killed $al killed $eax53; X64-NEXT: retq54 %3 = or i8 %1, %055 %4 = icmp eq i8 %3, 056 %5 = select i1 %4, i8 %0, i8 %357 ret i8 %558}59 60define i16 @or_i16_ri(i16 zeroext %0, i16 zeroext %1) {61; X86-LABEL: or_i16_ri:62; X86: # %bb.0:63; X86-NEXT: movl {{[0-9]+}}(%esp), %eax64; X86-NEXT: movl %eax, %ecx65; X86-NEXT: orl $65519, %ecx # imm = 0xFFEF66; X86-NEXT: testw %cx, %cx67; X86-NEXT: je .LBB2_268; X86-NEXT: # %bb.1:69; X86-NEXT: movl %ecx, %eax70; X86-NEXT: .LBB2_2:71; X86-NEXT: # kill: def $ax killed $ax killed $eax72; X86-NEXT: retl73;74; X64-LABEL: or_i16_ri:75; X64: # %bb.0:76; X64-NEXT: movl %edi, %eax77; X64-NEXT: orl $65519, %eax # imm = 0xFFEF78; X64-NEXT: cmovel %edi, %eax79; X64-NEXT: # kill: def $ax killed $ax killed $eax80; X64-NEXT: retq81 %3 = or i16 %0, -1782 %4 = icmp eq i16 %3, 083 %5 = select i1 %4, i16 %0, i16 %384 ret i16 %585}86 87define i16 @or_i16_rr(i16 zeroext %0, i16 zeroext %1) {88; X86-LABEL: or_i16_rr:89; X86: # %bb.0:90; X86-NEXT: movl {{[0-9]+}}(%esp), %eax91; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx92; X86-NEXT: orw %ax, %cx93; X86-NEXT: je .LBB3_294; X86-NEXT: # %bb.1:95; X86-NEXT: movl %ecx, %eax96; X86-NEXT: .LBB3_2:97; X86-NEXT: # kill: def $ax killed $ax killed $eax98; X86-NEXT: retl99;100; X64-LABEL: or_i16_rr:101; X64: # %bb.0:102; X64-NEXT: movl %esi, %eax103; X64-NEXT: orl %edi, %eax104; X64-NEXT: cmovel %edi, %eax105; X64-NEXT: # kill: def $ax killed $ax killed $eax106; X64-NEXT: retq107 %3 = or i16 %1, %0108 %4 = icmp eq i16 %3, 0109 %5 = select i1 %4, i16 %0, i16 %3110 ret i16 %5111}112 113define i32 @or_i32_ri(i32 %0, i32 %1) {114; X86-LABEL: or_i32_ri:115; X86: # %bb.0:116; X86-NEXT: movl {{[0-9]+}}(%esp), %eax117; X86-NEXT: movl %eax, %ecx118; X86-NEXT: orl $-17, %ecx119; X86-NEXT: jle .LBB4_2120; X86-NEXT: # %bb.1:121; X86-NEXT: movl %ecx, %eax122; X86-NEXT: .LBB4_2:123; X86-NEXT: retl124;125; X64-LABEL: or_i32_ri:126; X64: # %bb.0:127; X64-NEXT: movl %edi, %eax128; X64-NEXT: orl $-17, %eax129; X64-NEXT: cmovlel %edi, %eax130; X64-NEXT: retq131 %3 = or i32 %0, -17132 %4 = icmp slt i32 %3, 1133 %5 = select i1 %4, i32 %0, i32 %3134 ret i32 %5135}136 137define i32 @or_i32_rr(i32 %0, i32 %1) {138; X86-LABEL: or_i32_rr:139; X86: # %bb.0:140; X86-NEXT: movl {{[0-9]+}}(%esp), %eax141; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx142; X86-NEXT: orl %eax, %ecx143; X86-NEXT: jle .LBB5_2144; X86-NEXT: # %bb.1:145; X86-NEXT: movl %ecx, %eax146; X86-NEXT: .LBB5_2:147; X86-NEXT: retl148;149; X64-LABEL: or_i32_rr:150; X64: # %bb.0:151; X64-NEXT: movl %esi, %eax152; X64-NEXT: orl %edi, %eax153; X64-NEXT: cmovlel %edi, %eax154; X64-NEXT: retq155 %3 = or i32 %1, %0156 %4 = icmp slt i32 %3, 1157 %5 = select i1 %4, i32 %0, i32 %3158 ret i32 %5159}160 161define i64 @or_i64_ri(i64 %0, i64 %1) nounwind {162; X86-LABEL: or_i64_ri:163; X86: # %bb.0:164; X86-NEXT: movl {{[0-9]+}}(%esp), %eax165; X86-NEXT: movl {{[0-9]+}}(%esp), %edx166; X86-NEXT: testl %edx, %edx167; X86-NEXT: js .LBB6_2168; X86-NEXT: # %bb.1:169; X86-NEXT: orl $17, %eax170; X86-NEXT: .LBB6_2:171; X86-NEXT: retl172;173; X64-LABEL: or_i64_ri:174; X64: # %bb.0:175; X64-NEXT: movq %rdi, %rax176; X64-NEXT: orq $17, %rax177; X64-NEXT: cmovleq %rdi, %rax178; X64-NEXT: retq179 %3 = or i64 %0, 17180 %4 = icmp slt i64 %3, 1181 %5 = select i1 %4, i64 %0, i64 %3182 ret i64 %5183}184 185define i64 @or_i64_rr(i64 %0, i64 %1) nounwind {186; X86-LABEL: or_i64_rr:187; X86: # %bb.0:188; X86-NEXT: pushl %edi189; X86-NEXT: pushl %esi190; X86-NEXT: movl {{[0-9]+}}(%esp), %eax191; X86-NEXT: movl {{[0-9]+}}(%esp), %edx192; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx193; X86-NEXT: orl %edx, %ecx194; X86-NEXT: movl {{[0-9]+}}(%esp), %esi195; X86-NEXT: orl %eax, %esi196; X86-NEXT: cmpl $1, %esi197; X86-NEXT: movl %ecx, %edi198; X86-NEXT: sbbl $0, %edi199; X86-NEXT: jl .LBB7_2200; X86-NEXT: # %bb.1:201; X86-NEXT: movl %esi, %eax202; X86-NEXT: movl %ecx, %edx203; X86-NEXT: .LBB7_2:204; X86-NEXT: popl %esi205; X86-NEXT: popl %edi206; X86-NEXT: retl207;208; X64-LABEL: or_i64_rr:209; X64: # %bb.0:210; X64-NEXT: movq %rsi, %rax211; X64-NEXT: orq %rdi, %rax212; X64-NEXT: cmovleq %rdi, %rax213; X64-NEXT: retq214 %3 = or i64 %1, %0215 %4 = icmp slt i64 %3, 1216 %5 = select i1 %4, i64 %0, i64 %3217 ret i64 %5218}219