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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2,X86-SSE,X86-SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2,X64-SSE,X64-SSE24; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE4,X86-SSE,X86-SSE45; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE4,X64-SSE,X64-SSE46; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1,X86-AVX,X86-AVX17; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1,X64-AVX,X64-AVX18; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,X86-AVX,X86-AVX29; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,X64-AVX,X64-AVX210 11define <4 x i32> @trunc_lshr_v4i64(<4 x i64> %a) nounwind {12; SSE2-LABEL: trunc_lshr_v4i64:13; SSE2: # %bb.0:14; SSE2-NEXT: psrlq $63, %xmm115; SSE2-NEXT: psrlq $63, %xmm016; SSE2-NEXT: packuswb %xmm1, %xmm017; SSE2-NEXT: ret{{[l|q]}}18;19; SSE4-LABEL: trunc_lshr_v4i64:20; SSE4: # %bb.0:21; SSE4-NEXT: psrlq $63, %xmm122; SSE4-NEXT: psrlq $63, %xmm023; SSE4-NEXT: packusdw %xmm1, %xmm024; SSE4-NEXT: ret{{[l|q]}}25;26; AVX1-LABEL: trunc_lshr_v4i64:27; AVX1: # %bb.0:28; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm129; AVX1-NEXT: vpsrlq $63, %xmm1, %xmm130; AVX1-NEXT: vpsrlq $63, %xmm0, %xmm031; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm032; AVX1-NEXT: vzeroupper33; AVX1-NEXT: ret{{[l|q]}}34;35; AVX2-LABEL: trunc_lshr_v4i64:36; AVX2: # %bb.0:37; AVX2-NEXT: vpsrlq $63, %ymm0, %ymm038; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm139; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm040; AVX2-NEXT: vzeroupper41; AVX2-NEXT: ret{{[l|q]}}42 %1 = lshr <4 x i64> %a, <i64 63, i64 63, i64 63, i64 63>43 %2 = trunc <4 x i64> %1 to <4 x i32>44 ret <4 x i32> %245}46 47define <8 x i16> @trunc_lshr_v4i64_bitcast(<4 x i64> %a0) {48; SSE2-LABEL: trunc_lshr_v4i64_bitcast:49; SSE2: # %bb.0:50; SSE2-NEXT: psrlq $49, %xmm151; SSE2-NEXT: psrlq $49, %xmm052; SSE2-NEXT: packssdw %xmm1, %xmm053; SSE2-NEXT: ret{{[l|q]}}54;55; SSE4-LABEL: trunc_lshr_v4i64_bitcast:56; SSE4: # %bb.0:57; SSE4-NEXT: psrlq $49, %xmm158; SSE4-NEXT: psrlq $49, %xmm059; SSE4-NEXT: packusdw %xmm1, %xmm060; SSE4-NEXT: ret{{[l|q]}}61;62; AVX1-LABEL: trunc_lshr_v4i64_bitcast:63; AVX1: # %bb.0:64; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm165; AVX1-NEXT: vpsrlq $49, %xmm1, %xmm166; AVX1-NEXT: vpsrlq $49, %xmm0, %xmm067; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm068; AVX1-NEXT: vzeroupper69; AVX1-NEXT: ret{{[l|q]}}70;71; AVX2-LABEL: trunc_lshr_v4i64_bitcast:72; AVX2: # %bb.0:73; AVX2-NEXT: vpsrlq $49, %ymm0, %ymm074; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm175; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm076; AVX2-NEXT: vzeroupper77; AVX2-NEXT: ret{{[l|q]}}78 %1 = lshr <4 x i64> %a0, <i64 49, i64 49, i64 49, i64 49>79 %2 = bitcast <4 x i64> %1 to <8 x i32>80 %3 = trunc <8 x i32> %2 to <8 x i16>81 ret <8 x i16> %382}83 84define <8 x i16> @trunc_lshr_v8i32(<8 x i32> %a) nounwind {85; SSE2-LABEL: trunc_lshr_v8i32:86; SSE2: # %bb.0:87; SSE2-NEXT: psrld $31, %xmm188; SSE2-NEXT: psrld $31, %xmm089; SSE2-NEXT: packuswb %xmm1, %xmm090; SSE2-NEXT: ret{{[l|q]}}91;92; SSE4-LABEL: trunc_lshr_v8i32:93; SSE4: # %bb.0:94; SSE4-NEXT: psrld $31, %xmm195; SSE4-NEXT: psrld $31, %xmm096; SSE4-NEXT: packusdw %xmm1, %xmm097; SSE4-NEXT: ret{{[l|q]}}98;99; AVX1-LABEL: trunc_lshr_v8i32:100; AVX1: # %bb.0:101; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1102; AVX1-NEXT: vpsrld $31, %xmm1, %xmm1103; AVX1-NEXT: vpsrld $31, %xmm0, %xmm0104; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0105; AVX1-NEXT: vzeroupper106; AVX1-NEXT: ret{{[l|q]}}107;108; AVX2-LABEL: trunc_lshr_v8i32:109; AVX2: # %bb.0:110; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0111; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1112; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0113; AVX2-NEXT: vzeroupper114; AVX2-NEXT: ret{{[l|q]}}115 %1 = lshr <8 x i32> %a, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>116 %2 = trunc <8 x i32> %1 to <8 x i16>117 ret <8 x i16> %2118}119 120define <8 x i16> @trunc_lshr_v4i64_demandedelts(<4 x i64> %a0) {121; SSE2-LABEL: trunc_lshr_v4i64_demandedelts:122; SSE2: # %bb.0:123; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]124; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]125; SSE2-NEXT: pand %xmm2, %xmm1126; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]127; SSE2-NEXT: pand %xmm2, %xmm0128; SSE2-NEXT: packuswb %xmm1, %xmm0129; SSE2-NEXT: ret{{[l|q]}}130;131; SSE4-LABEL: trunc_lshr_v4i64_demandedelts:132; SSE4: # %bb.0:133; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]134; SSE4-NEXT: pmovsxbd {{.*#+}} xmm2 = [1,1,1,1]135; SSE4-NEXT: pand %xmm2, %xmm1136; SSE4-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]137; SSE4-NEXT: pand %xmm2, %xmm0138; SSE4-NEXT: packusdw %xmm1, %xmm0139; SSE4-NEXT: ret{{[l|q]}}140;141; X86-AVX1-LABEL: trunc_lshr_v4i64_demandedelts:142; X86-AVX1: # %bb.0:143; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4]144; X86-AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0145; X86-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1146; X86-AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0147; X86-AVX1-NEXT: vzeroupper148; X86-AVX1-NEXT: retl149;150; X64-AVX1-LABEL: trunc_lshr_v4i64_demandedelts:151; X64-AVX1: # %bb.0:152; X64-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4]153; X64-AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0154; X64-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1155; X64-AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0156; X64-AVX1-NEXT: vzeroupper157; X64-AVX1-NEXT: retq158;159; AVX2-LABEL: trunc_lshr_v4i64_demandedelts:160; AVX2: # %bb.0:161; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4]162; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]163; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0164; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1165; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0166; AVX2-NEXT: vzeroupper167; AVX2-NEXT: ret{{[l|q]}}168 %1 = shl <4 x i64> %a0, <i64 63, i64 0, i64 63, i64 0>169 %2 = lshr <4 x i64> %1, <i64 63, i64 0, i64 63, i64 0>170 %3 = bitcast <4 x i64> %2 to <8 x i32>171 %4 = shufflevector <8 x i32> %3, <8 x i32> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>172 %5 = trunc <8 x i32> %4 to <8 x i16>173 ret <8 x i16> %5174}175 176define <16 x i8> @shuffle_lshr_2v8i16(<8 x i16> %a0, <8 x i16> %a1) {177; SSE-LABEL: shuffle_lshr_2v8i16:178; SSE: # %bb.0:179; SSE-NEXT: psrlw $15, %xmm0180; SSE-NEXT: psrlw $15, %xmm1181; SSE-NEXT: packuswb %xmm1, %xmm0182; SSE-NEXT: ret{{[l|q]}}183;184; AVX-LABEL: shuffle_lshr_2v8i16:185; AVX: # %bb.0:186; AVX-NEXT: vpsrlw $15, %xmm0, %xmm0187; AVX-NEXT: vpsrlw $15, %xmm1, %xmm1188; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0189; AVX-NEXT: ret{{[l|q]}}190 %lshr0 = lshr <8 x i16> %a0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>191 %lshr1 = lshr <8 x i16> %a1, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>192 %bc0 = bitcast <8 x i16> %lshr0 to <16 x i8>193 %bc1 = bitcast <8 x i16> %lshr1 to <16 x i8>194 %res = shufflevector <16 x i8> %bc0, <16 x i8> %bc1, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>195 ret <16 x i8> %res196}197 198define <8 x i16> @shuffle_lshr_2v4i32(<4 x i32> %a0, <4 x i32> %a1) {199; SSE2-LABEL: shuffle_lshr_2v4i32:200; SSE2: # %bb.0:201; SSE2-NEXT: psrld $31, %xmm0202; SSE2-NEXT: psrld $31, %xmm1203; SSE2-NEXT: packssdw %xmm1, %xmm0204; SSE2-NEXT: ret{{[l|q]}}205;206; SSE4-LABEL: shuffle_lshr_2v4i32:207; SSE4: # %bb.0:208; SSE4-NEXT: psrld $31, %xmm0209; SSE4-NEXT: psrld $31, %xmm1210; SSE4-NEXT: packusdw %xmm1, %xmm0211; SSE4-NEXT: ret{{[l|q]}}212;213; AVX-LABEL: shuffle_lshr_2v4i32:214; AVX: # %bb.0:215; AVX-NEXT: vpsrld $31, %xmm0, %xmm0216; AVX-NEXT: vpsrld $31, %xmm1, %xmm1217; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0218; AVX-NEXT: ret{{[l|q]}}219 %lshr0 = lshr <4 x i32> %a0, <i32 31, i32 31, i32 31, i32 31>220 %lshr1 = lshr <4 x i32> %a1, <i32 31, i32 31, i32 31, i32 31>221 %bc0 = bitcast <4 x i32> %lshr0 to <8 x i16>222 %bc1 = bitcast <4 x i32> %lshr1 to <8 x i16>223 %res = shufflevector <8 x i16> %bc0, <8 x i16> %bc1, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>224 ret <8 x i16> %res225}226 227define <4 x i32> @shuffle_lshr_2v2i64(<2 x i64> %a0, <2 x i64> %a1) {228; SSE2-LABEL: shuffle_lshr_2v2i64:229; SSE2: # %bb.0:230; SSE2-NEXT: psrlq $63, %xmm0231; SSE2-NEXT: psrlq $63, %xmm1232; SSE2-NEXT: packuswb %xmm1, %xmm0233; SSE2-NEXT: ret{{[l|q]}}234;235; SSE4-LABEL: shuffle_lshr_2v2i64:236; SSE4: # %bb.0:237; SSE4-NEXT: psrlq $63, %xmm0238; SSE4-NEXT: psrlq $63, %xmm1239; SSE4-NEXT: packusdw %xmm1, %xmm0240; SSE4-NEXT: ret{{[l|q]}}241;242; AVX-LABEL: shuffle_lshr_2v2i64:243; AVX: # %bb.0:244; AVX-NEXT: vpsrlq $63, %xmm0, %xmm0245; AVX-NEXT: vpsrlq $63, %xmm1, %xmm1246; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0247; AVX-NEXT: ret{{[l|q]}}248 %lshr0 = lshr <2 x i64> %a0, <i64 63, i64 63>249 %lshr1 = lshr <2 x i64> %a1, <i64 63, i64 63>250 %bc0 = bitcast <2 x i64> %lshr0 to <4 x i32>251 %bc1 = bitcast <2 x i64> %lshr1 to <4 x i32>252 %res = shufflevector <4 x i32> %bc0, <4 x i32> %bc1, <4 x i32> <i32 0, i32 2, i32 4, i32 6>253 ret <4 x i32> %res254}255 256define <4 x float> @shuffle_lshr_2v2i64_bitcast(<2 x i64> %a0, <2 x i64> %a1) {257; SSE2-LABEL: shuffle_lshr_2v2i64_bitcast:258; SSE2: # %bb.0:259; SSE2-NEXT: psrlq $63, %xmm0260; SSE2-NEXT: psrlq $63, %xmm1261; SSE2-NEXT: packuswb %xmm1, %xmm0262; SSE2-NEXT: ret{{[l|q]}}263;264; SSE4-LABEL: shuffle_lshr_2v2i64_bitcast:265; SSE4: # %bb.0:266; SSE4-NEXT: psrlq $63, %xmm0267; SSE4-NEXT: psrlq $63, %xmm1268; SSE4-NEXT: packusdw %xmm1, %xmm0269; SSE4-NEXT: ret{{[l|q]}}270;271; AVX-LABEL: shuffle_lshr_2v2i64_bitcast:272; AVX: # %bb.0:273; AVX-NEXT: vpsrlq $63, %xmm0, %xmm0274; AVX-NEXT: vpsrlq $63, %xmm1, %xmm1275; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0276; AVX-NEXT: ret{{[l|q]}}277 %lshr0 = lshr <2 x i64> %a0, <i64 63, i64 63>278 %lshr1 = lshr <2 x i64> %a1, <i64 63, i64 63>279 %bc0 = bitcast <2 x i64> %lshr0 to <4 x float>280 %bc1 = bitcast <2 x i64> %lshr1 to <4 x float>281 %res = shufflevector <4 x float> %bc0, <4 x float> %bc1, <4 x i32> <i32 0, i32 2, i32 4, i32 6>282 ret <4 x float> %res283}284 285define <16 x i8> @packuswb_icmp_zero_128(<8 x i16> %a0) {286; X86-SSE-LABEL: packuswb_icmp_zero_128:287; X86-SSE: # %bb.0:288; X86-SSE-NEXT: pxor %xmm1, %xmm1289; X86-SSE-NEXT: pcmpeqw %xmm0, %xmm1290; X86-SSE-NEXT: packsswb %xmm1, %xmm1291; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1292; X86-SSE-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero293; X86-SSE-NEXT: retl294;295; X64-SSE-LABEL: packuswb_icmp_zero_128:296; X64-SSE: # %bb.0:297; X64-SSE-NEXT: pxor %xmm1, %xmm1298; X64-SSE-NEXT: pcmpeqw %xmm0, %xmm1299; X64-SSE-NEXT: packsswb %xmm1, %xmm1300; X64-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1301; X64-SSE-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero302; X64-SSE-NEXT: retq303;304; X86-AVX-LABEL: packuswb_icmp_zero_128:305; X86-AVX: # %bb.0:306; X86-AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1307; X86-AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0308; X86-AVX-NEXT: vpacksswb %xmm0, %xmm0, %xmm0309; X86-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0310; X86-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero311; X86-AVX-NEXT: retl312;313; X64-AVX-LABEL: packuswb_icmp_zero_128:314; X64-AVX: # %bb.0:315; X64-AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1316; X64-AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0317; X64-AVX-NEXT: vpacksswb %xmm0, %xmm0, %xmm0318; X64-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0319; X64-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero320; X64-AVX-NEXT: retq321 %1 = icmp eq <8 x i16> %a0, zeroinitializer322 %2 = zext <8 x i1> %1 to <8 x i8>323 %3 = shufflevector <8 x i8> %2, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>324 ret <16 x i8> %3325}326 327define <16 x i8> @packuswb_icmp_zero_trunc_128(<8 x i16> %a0) {328; SSE-LABEL: packuswb_icmp_zero_trunc_128:329; SSE: # %bb.0:330; SSE-NEXT: pxor %xmm1, %xmm1331; SSE-NEXT: pcmpeqw %xmm1, %xmm0332; SSE-NEXT: psrlw $15, %xmm0333; SSE-NEXT: packuswb %xmm1, %xmm0334; SSE-NEXT: ret{{[l|q]}}335;336; AVX-LABEL: packuswb_icmp_zero_trunc_128:337; AVX: # %bb.0:338; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1339; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0340; AVX-NEXT: vpsrlw $15, %xmm0, %xmm0341; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0342; AVX-NEXT: ret{{[l|q]}}343 %1 = icmp eq <8 x i16> %a0, zeroinitializer344 %2 = zext <8 x i1> %1 to <8 x i16>345 %3 = shufflevector <8 x i16> %2, <8 x i16> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>346 %4 = trunc <16 x i16> %3 to <16 x i8>347 ret <16 x i8> %4348}349 350define <32 x i8> @packuswb_icmp_zero_256(<16 x i16> %a0) {351; SSE-LABEL: packuswb_icmp_zero_256:352; SSE: # %bb.0:353; SSE-NEXT: pxor %xmm2, %xmm2354; SSE-NEXT: pcmpeqw %xmm2, %xmm1355; SSE-NEXT: psrlw $15, %xmm1356; SSE-NEXT: pcmpeqw %xmm2, %xmm0357; SSE-NEXT: psrlw $15, %xmm0358; SSE-NEXT: pxor %xmm3, %xmm3359; SSE-NEXT: packuswb %xmm0, %xmm3360; SSE-NEXT: packuswb %xmm1, %xmm2361; SSE-NEXT: movdqa %xmm3, %xmm0362; SSE-NEXT: movdqa %xmm2, %xmm1363; SSE-NEXT: ret{{[l|q]}}364;365; X86-AVX1-LABEL: packuswb_icmp_zero_256:366; X86-AVX1: # %bb.0:367; X86-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1368; X86-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2369; X86-AVX1-NEXT: vpcmpeqw %xmm2, %xmm1, %xmm1370; X86-AVX1-NEXT: vpcmpeqw %xmm2, %xmm0, %xmm0371; X86-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0372; X86-AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0373; X86-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1374; X86-AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1375; X86-AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0376; X86-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0377; X86-AVX1-NEXT: retl378;379; X64-AVX1-LABEL: packuswb_icmp_zero_256:380; X64-AVX1: # %bb.0:381; X64-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1382; X64-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2383; X64-AVX1-NEXT: vpcmpeqw %xmm2, %xmm1, %xmm1384; X64-AVX1-NEXT: vpcmpeqw %xmm2, %xmm0, %xmm0385; X64-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0386; X64-AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0387; X64-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1388; X64-AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1389; X64-AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0390; X64-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0391; X64-AVX1-NEXT: retq392;393; AVX2-LABEL: packuswb_icmp_zero_256:394; AVX2: # %bb.0:395; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1396; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0397; AVX2-NEXT: vpsrlw $15, %ymm0, %ymm0398; AVX2-NEXT: vpackuswb %ymm0, %ymm1, %ymm0399; AVX2-NEXT: ret{{[l|q]}}400 %1 = icmp eq <16 x i16> %a0, zeroinitializer401 %2 = zext <16 x i1> %1 to <16 x i16>402 %3 = bitcast <16 x i16> %2 to <32 x i8>403 %4 = shufflevector <32 x i8> zeroinitializer, <32 x i8> %3, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62>404 ret <32 x i8> %4405}406 407define <32 x i8> @packuswb_icmp_zero_trunc_256(<16 x i16> %a0) {408; SSE-LABEL: packuswb_icmp_zero_trunc_256:409; SSE: # %bb.0:410; SSE-NEXT: pxor %xmm2, %xmm2411; SSE-NEXT: pcmpeqw %xmm2, %xmm1412; SSE-NEXT: psrlw $15, %xmm1413; SSE-NEXT: pcmpeqw %xmm2, %xmm0414; SSE-NEXT: psrlw $15, %xmm0415; SSE-NEXT: pxor %xmm3, %xmm3416; SSE-NEXT: packuswb %xmm0, %xmm3417; SSE-NEXT: packuswb %xmm1, %xmm2418; SSE-NEXT: movdqa %xmm3, %xmm0419; SSE-NEXT: movdqa %xmm2, %xmm1420; SSE-NEXT: ret{{[l|q]}}421;422; AVX1-LABEL: packuswb_icmp_zero_trunc_256:423; AVX1: # %bb.0:424; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1425; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm2426; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0427; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0428; AVX1-NEXT: vpsrlw $15, %xmm0, %xmm0429; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0430; AVX1-NEXT: vpsrlw $15, %xmm2, %xmm2431; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1432; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0433; AVX1-NEXT: ret{{[l|q]}}434;435; AVX2-LABEL: packuswb_icmp_zero_trunc_256:436; AVX2: # %bb.0:437; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1438; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0439; AVX2-NEXT: vpsrlw $15, %ymm0, %ymm0440; AVX2-NEXT: vpackuswb %ymm0, %ymm1, %ymm0441; AVX2-NEXT: ret{{[l|q]}}442 %1 = icmp eq <16 x i16> %a0, zeroinitializer443 %2 = zext <16 x i1> %1 to <16 x i16>444 %3 = shufflevector <16 x i16> zeroinitializer, <16 x i16> %2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>445 %4 = trunc <32 x i16> %3 to <32 x i8>446 ret <32 x i8> %4447}448;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:449; X64-AVX2: {{.*}}450; X64-SSE2: {{.*}}451; X64-SSE4: {{.*}}452; X86-AVX2: {{.*}}453; X86-SSE2: {{.*}}454; X86-SSE4: {{.*}}455