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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -run-pass=peephole-opt -mtriple=x86_64-- %s -o - | FileCheck %s3 4--- |5 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"6 target triple = "x86_64-unknown-linux-gnu"7 8 define i32 @atomic(ptr %arg) {9 %load = load atomic ptr, ptr %arg unordered, align 810 %cmp = icmp eq ptr %load, null11 %zext = zext i1 %cmp to i3212 ret i32 %zext13 }14 15 define i32 @nonatomic_unoptimized(ptr %arg) {16 %load = load ptr, ptr %arg, align 817 %cmp = icmp eq ptr %load, null18 %zext = zext i1 %cmp to i3219 ret i32 %zext20 }21 22...23---24name: atomic25alignment: 1626tracksRegLiveness: true27registers:28 - { id: 0, class: gr64 }29 - { id: 1, class: gr64 }30 - { id: 2, class: gr8 }31 - { id: 3, class: gr32 }32liveins:33 - { reg: '$rdi', virtual-reg: '%0' }34machineFunctionInfo: {}35body: |36 bb.0 (%ir-block.0):37 liveins: $rdi38 39 ; CHECK-LABEL: name: atomic40 ; CHECK: liveins: $rdi41 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi42 ; CHECK: CMP64mi32 [[COPY]], 1, $noreg, 0, $noreg, 0, implicit-def $eflags :: (load unordered (s64) from %ir.arg)43 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags44 ; CHECK: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 killed [[SETCCr]]45 ; CHECK: $eax = COPY [[MOVZX32rr8_]]46 ; CHECK: RET 0, $eax47 %0:gr64 = COPY $rdi48 %1:gr64 = MOV64rm %0, 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.arg)49 TEST64rr %1, %1, implicit-def $eflags50 %2:gr8 = SETCCr 4, implicit $eflags51 %3:gr32 = MOVZX32rr8 killed %252 $eax = COPY %353 RET 0, $eax54 55...56---57name: nonatomic_unoptimized58alignment: 1659tracksRegLiveness: true60registers:61 - { id: 0, class: gr64 }62 - { id: 1, class: gr64 }63 - { id: 2, class: gr8 }64 - { id: 3, class: gr32 }65liveins:66 - { reg: '$rdi', virtual-reg: '%0' }67machineFunctionInfo: {}68body: |69 bb.0 (%ir-block.0):70 liveins: $rdi71 72 ; CHECK-LABEL: name: nonatomic_unoptimized73 ; CHECK: liveins: $rdi74 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi75 ; CHECK: CMP64mi32 [[COPY]], 1, $noreg, 0, $noreg, 0, implicit-def $eflags :: (load (s64) from %ir.arg)76 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags77 ; CHECK: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 killed [[SETCCr]]78 ; CHECK: $eax = COPY [[MOVZX32rr8_]]79 ; CHECK: RET 0, $eax80 %0:gr64 = COPY $rdi81 %1:gr64 = MOV64rm %0, 1, $noreg, 0, $noreg :: (load (s64) from %ir.arg)82 TEST64rr %1, %1, implicit-def $eflags83 %2:gr8 = SETCCr 4, implicit $eflags84 %3:gr32 = MOVZX32rr8 killed %285 $eax = COPY %386 RET 0, $eax87 88...89