233 lines · plain
1# RUN: llc -mtriple=x86_64-- -run-pass=peephole-opt -o - %s | FileCheck %s2 3--- |4 define i32 @foo(i32 %a) {5 bb0:6 br label %bb17 8 bb1: ; preds = %bb7, %bb09 %vreg0 = phi i32 [ 0, %bb0 ], [ %vreg3, %bb7 ]10 %cond0 = icmp eq i32 %a, 011 br i1 %cond0, label %bb4, label %bb312 13 bb3: ; preds = %bb114 br label %bb415 16 bb4: ; preds = %bb1, %bb317 %vreg5 = phi i32 [ 2, %bb3 ], [ 1, %bb1 ]18 %cond1 = icmp eq i32 %vreg5, 019 br i1 %cond1, label %bb7, label %bb620 21 bb6: ; preds = %bb422 br label %bb723 24 bb7: ; preds = %bb4, %bb625 %vreg1 = phi i32 [ 2, %bb6 ], [ 1, %bb4 ]26 %vreg2 = add i32 %vreg5, %vreg027 %vreg3 = add i32 %vreg1, %vreg228 %cond2 = icmp slt i32 %vreg3, 1029 br i1 %cond2, label %bb1, label %bb830 31 bb8: ; preds = %bb732 ret i32 033 }34 35 define i32 @bar(i32 %a, ptr %p) {36 bb0:37 br label %bb138 39 bb1: ; preds = %bb7, %bb040 %vreg0 = phi i32 [ 0, %bb0 ], [ %vreg3, %bb7 ]41 %cond0 = icmp eq i32 %a, 042 br i1 %cond0, label %bb4, label %bb343 44 bb3: ; preds = %bb145 br label %bb446 47 bb4: ; preds = %bb1, %bb348 %vreg5 = phi i32 [ 2, %bb3 ], [ 1, %bb1 ]49 %cond1 = icmp eq i32 %vreg5, 050 br i1 %cond1, label %bb7, label %bb651 52 bb6: ; preds = %bb453 br label %bb754 55 bb7: ; preds = %bb4, %bb656 %vreg1 = phi i32 [ 2, %bb6 ], [ 1, %bb4 ]57 %vreg2 = add i32 %vreg5, %vreg058 store i32 %vreg0, ptr %p59 %vreg3 = add i32 %vreg1, %vreg260 %cond2 = icmp slt i32 %vreg3, 1061 br i1 %cond2, label %bb1, label %bb862 63 bb8: ; preds = %bb764 ret i32 065 }66 67...68---69# There is a recurrence formulated around %0, %10, and %3. Check that operands70# are commuted for ADD instructions in bb.5.bb7 so that the values involved in71# the recurrence are tied. This will remove redundant copy instruction.72name: foo73tracksRegLiveness: true74registers:75 - { id: 0, class: gr32, preferred-register: '' }76 - { id: 1, class: gr32, preferred-register: '' }77 - { id: 2, class: gr32, preferred-register: '' }78 - { id: 3, class: gr32, preferred-register: '' }79 - { id: 4, class: gr32, preferred-register: '' }80 - { id: 5, class: gr32, preferred-register: '' }81 - { id: 6, class: gr32, preferred-register: '' }82 - { id: 7, class: gr32, preferred-register: '' }83 - { id: 8, class: gr32, preferred-register: '' }84 - { id: 9, class: gr32, preferred-register: '' }85 - { id: 10, class: gr32, preferred-register: '' }86 - { id: 11, class: gr32, preferred-register: '' }87 - { id: 12, class: gr32, preferred-register: '' }88liveins:89 - { reg: '$edi', virtual-reg: '%4' }90body: |91 bb.0.bb0:92 successors: %bb.1(0x80000000)93 liveins: $edi94 95 %4 = COPY $edi96 %5 = MOV32r0 implicit-def dead $eflags97 98 bb.1.bb1:99 successors: %bb.3(0x30000000), %bb.2(0x50000000)100 101 ; CHECK: %0:gr32 = PHI %5, %bb.0, %3, %bb.5102 %0 = PHI %5, %bb.0, %3, %bb.5103 %6 = MOV32ri 1104 TEST32rr %4, %4, implicit-def $eflags105 JCC_1 %bb.3, 4, implicit $eflags106 JMP_1 %bb.2107 108 bb.2.bb3:109 successors: %bb.3(0x80000000)110 111 %7 = MOV32ri 2112 113 bb.3.bb4:114 successors: %bb.5(0x30000000), %bb.4(0x50000000)115 116 %1 = PHI %6, %bb.1, %7, %bb.2117 TEST32rr %1, %1, implicit-def $eflags118 JCC_1 %bb.5, 4, implicit $eflags119 JMP_1 %bb.4120 121 bb.4.bb6:122 successors: %bb.5(0x80000000)123 124 %9 = MOV32ri 2125 126 bb.5.bb7:127 successors: %bb.1(0x7c000000), %bb.6(0x04000000)128 129 %2 = PHI %6, %bb.3, %9, %bb.4130 %10 = ADD32rr %1, %0, implicit-def dead $eflags131 ; CHECK: %10:gr32 = ADD32rr132 ; CHECK-SAME: %0,133 ; CHECK-SAME: %1,134 %3 = ADD32rr %2, killed %10, implicit-def dead $eflags135 ; CHECK: %3:gr32 = ADD32rr136 ; CHECK-SAME: %10,137 ; CHECK-SAME: %2,138 %11 = SUB32ri8 %3, 10, implicit-def $eflags139 JCC_1 %bb.1, 12, implicit $eflags140 JMP_1 %bb.6141 142 bb.6.bb8:143 %12 = MOV32r0 implicit-def dead $eflags144 $eax = COPY %12145 RET 0, $eax146 147...148---149# Here a recurrence is formulated around %0, %11, and %3, but operands should150# not be commuted because %0 has a use outside of recurrence. This is to151# prevent the case of commuting operands ties the values with overlapping live152# ranges.153name: bar154tracksRegLiveness: true155registers:156 - { id: 0, class: gr32, preferred-register: '' }157 - { id: 1, class: gr32, preferred-register: '' }158 - { id: 2, class: gr32, preferred-register: '' }159 - { id: 3, class: gr32, preferred-register: '' }160 - { id: 4, class: gr32, preferred-register: '' }161 - { id: 5, class: gr64, preferred-register: '' }162 - { id: 6, class: gr32, preferred-register: '' }163 - { id: 7, class: gr32, preferred-register: '' }164 - { id: 8, class: gr32, preferred-register: '' }165 - { id: 9, class: gr32, preferred-register: '' }166 - { id: 10, class: gr32, preferred-register: '' }167 - { id: 11, class: gr32, preferred-register: '' }168 - { id: 12, class: gr32, preferred-register: '' }169 - { id: 13, class: gr32, preferred-register: '' }170liveins:171 - { reg: '$edi', virtual-reg: '%4' }172 - { reg: '$rsi', virtual-reg: '%5' }173body: |174 bb.0.bb0:175 successors: %bb.1(0x80000000)176 liveins: $edi, $rsi177 178 %5 = COPY $rsi179 %4 = COPY $edi180 %6 = MOV32r0 implicit-def dead $eflags181 182 bb.1.bb1:183 successors: %bb.3(0x30000000), %bb.2(0x50000000)184 185 %0 = PHI %6, %bb.0, %3, %bb.5186 ; CHECK: %0:gr32 = PHI %6, %bb.0, %3, %bb.5187 %7 = MOV32ri 1188 TEST32rr %4, %4, implicit-def $eflags189 JCC_1 %bb.3, 4, implicit $eflags190 JMP_1 %bb.2191 192 bb.2.bb3:193 successors: %bb.3(0x80000000)194 195 %8 = MOV32ri 2196 197 bb.3.bb4:198 successors: %bb.5(0x30000000), %bb.4(0x50000000)199 200 %1 = PHI %7, %bb.1, %8, %bb.2201 TEST32rr %1, %1, implicit-def $eflags202 JCC_1 %bb.5, 4, implicit $eflags203 JMP_1 %bb.4204 205 bb.4.bb6:206 successors: %bb.5(0x80000000)207 208 %10 = MOV32ri 2209 210 bb.5.bb7:211 successors: %bb.1(0x7c000000), %bb.6(0x04000000)212 213 %2 = PHI %7, %bb.3, %10, %bb.4214 %11 = ADD32rr %1, %0, implicit-def dead $eflags215 ; CHECK: %11:gr32 = ADD32rr216 ; CHECK-SAME: %1,217 ; CHECK-SAME: %0,218 MOV32mr %5, 1, $noreg, 0, $noreg, %0 :: (store (s32) into %ir.p)219 %3 = ADD32rr %2, killed %11, implicit-def dead $eflags220 ; CHECK: %3:gr32 = ADD32rr221 ; CHECK-SAME: %2,222 ; CHECK-SAME: %11,223 %12 = SUB32ri8 %3, 10, implicit-def $eflags224 JCC_1 %bb.1, 12, implicit $eflags225 JMP_1 %bb.6226 227 bb.6.bb8:228 %13 = MOV32r0 implicit-def dead $eflags229 $eax = COPY %13230 RET 0, $eax231 232...233