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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -o - %s -mtriple=x86_64-unknown-linux-gnu --run-pass=peephole-opt | FileCheck %s3 4# Test that TEST64rr is erased in `test_erased`, and kept in `test_not_erased_when_sf_used`5# and `test_not_erased_when_eflags_change`.6 7--- |8  ; ModuleID = 'tmp.ll'9  source_filename = "tmp.ll"10  target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"11 12  define i64 @test_erased(ptr %0, i64 %1, i64 %2) {13    %4 = load i64, ptr %0, align 814    %5 = and i64 %4, 315    %6 = icmp eq i64 %5, 016    %7 = select i1 %6, i64 %1, i64 %517    store i64 %7, ptr %0, align 818    ret i64 %519  }20 21  define i64 @test_not_erased_when_sf_used(ptr %0, i64 %1, i64 %2, i64 %3) {22    %5 = load i64, ptr %0, align 823    %6 = and i64 %5, 324    %7 = icmp slt i64 %6, 025    %8 = select i1 %7, i64 %1, i64 %626    store i64 %8, ptr %0, align 827    ret i64 %528  }29 30  define void @test_not_erased_when_eflags_change(ptr %0, i64 %1, i64 %2, i64 %3, ptr %4) {31    %6 = load i64, ptr %0, align 832    %7 = and i64 %6, 333    %8 = xor i64 %3, 534    %9 = icmp eq i64 %7, 035    %10 = select i1 %9, i64 %1, i64 %736    store i64 %10, ptr %0, align 837    store i64 %8, ptr %4, align 838    ret void39  }40 41  define i16 @erase_test16(i16 %0, i16 %1, ptr nocapture %2) {42  entry:43    %3 = icmp ne i16 %0, 044    %4 = and i16 %1, 12345    %5 = icmp eq i16 %4, 046    %6 = select i1 %3, i1 %5, i1 false47    br i1 %6, label %if.then, label %if.end48 49  if.then:                                          ; preds = %entry50    store i16 %0, ptr %2, align 451    br label %if.end52 53  if.end:                                           ; preds = %if.then, %entry54    ret i16 055  }56 57  define i16 @erase_test16_bigimm(i16 %0, i32 %1, ptr nocapture %2) {58  entry:59    %3 = icmp ne i16 %0, 060    %4 = and i32 %1, 12345661    %trunc = trunc i32 %4 to i1662    %5 = icmp eq i16 %trunc, 063    %6 = select i1 %3, i1 %5, i1 false64    br i1 %6, label %if.then, label %if.end65 66  if.then:                                          ; preds = %entry67    store i32 %4, ptr %2, align 468    br label %if.end69 70  if.end:                                           ; preds = %if.then, %entry71    ret i16 072  }73 74  define i16 @erase_test16_sf(i16 %0, i16 %1, ptr nocapture %2) {75  entry:76    %3 = icmp ne i16 %0, 077    %4 = and i16 %1, 123478    %5 = icmp slt i16 %4, 079    %6 = select i1 %3, i1 %5, i1 false80    br i1 %6, label %if.then, label %if.end81 82  if.then:                                          ; preds = %entry83    store i16 %4, ptr %2, align 484    br label %if.end85 86  if.end:                                           ; preds = %if.then, %entry87    ret i16 088  }89...90---91name:            test_erased92alignment:       1693tracksDebugUserValues: false94registers:95  - { id: 0, class: gr64, preferred-register: '' }96  - { id: 1, class: gr64, preferred-register: '' }97  - { id: 2, class: gr64, preferred-register: '' }98  - { id: 3, class: gr64, preferred-register: '' }99  - { id: 4, class: gr32, preferred-register: '' }100  - { id: 5, class: gr32, preferred-register: '' }101  - { id: 6, class: gr64, preferred-register: '' }102  - { id: 7, class: gr64, preferred-register: '' }103liveins:104  - { reg: '$rdi', virtual-reg: '%0' }105  - { reg: '$rsi', virtual-reg: '%1' }106frameInfo:107  maxAlignment:    1108machineFunctionInfo: {}109body:             |110  bb.0 (%ir-block.3):111    liveins: $rdi, $rsi112 113    ; CHECK-LABEL: name: test_erased114    ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi115    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi116    ; CHECK-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s64) from %ir.0)117    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY [[MOV64rm]].sub_32bit118    ; CHECK-NEXT: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[COPY2]], 3, implicit-def $eflags119    ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, killed [[AND32ri8_]], %subreg.sub_32bit120    ; CHECK-NEXT: [[CMOV64rr:%[0-9]+]]:gr64 = CMOV64rr [[SUBREG_TO_REG]], [[COPY]], 4, implicit $eflags121    ; CHECK-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[CMOV64rr]] :: (store (s64) into %ir.0)122    ; CHECK-NEXT: $rax = COPY [[SUBREG_TO_REG]]123    ; CHECK-NEXT: RET 0, $rax124    %1:gr64 = COPY $rsi125    %0:gr64 = COPY $rdi126    %3:gr64 = MOV64rm %0, 1, $noreg, 0, $noreg :: (load (s64) from %ir.0)127    %4:gr32 = COPY %3.sub_32bit128    %5:gr32 = AND32ri8 %4, 3, implicit-def dead $eflags129    %6:gr64 = SUBREG_TO_REG 0, killed %5, %subreg.sub_32bit130    TEST64rr %6, %6, implicit-def $eflags131    %7:gr64 = CMOV64rr %6, %1, 4, implicit $eflags132    MOV64mr %0, 1, $noreg, 0, $noreg, killed %7 :: (store (s64) into %ir.0)133    $rax = COPY %6134    RET 0, $rax135 136...137---138name:            test_not_erased_when_sf_used139alignment:       16140tracksDebugUserValues: false141registers:142  - { id: 0, class: gr64, preferred-register: '' }143  - { id: 1, class: gr64, preferred-register: '' }144  - { id: 2, class: gr64, preferred-register: '' }145  - { id: 3, class: gr64, preferred-register: '' }146  - { id: 4, class: gr64, preferred-register: '' }147  - { id: 5, class: gr32, preferred-register: '' }148  - { id: 6, class: gr32, preferred-register: '' }149  - { id: 7, class: gr64, preferred-register: '' }150  - { id: 8, class: gr64, preferred-register: '' }151liveins:152  - { reg: '$rdi', virtual-reg: '%0' }153  - { reg: '$rsi', virtual-reg: '%1' }154frameInfo:155  maxAlignment:    1156machineFunctionInfo: {}157body:             |158  bb.0 (%ir-block.4):159    liveins: $rdi, $rsi160 161    ; CHECK-LABEL: name: test_not_erased_when_sf_used162    ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi163    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi164    ; CHECK-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s64) from %ir.0)165    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY [[MOV64rm]].sub_32bit166    ; CHECK-NEXT: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[COPY2]], 3, implicit-def dead $eflags167    ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, killed [[AND32ri8_]], %subreg.sub_32bit168    ; CHECK-NEXT: TEST64rr [[SUBREG_TO_REG]], [[SUBREG_TO_REG]], implicit-def $eflags169    ; CHECK-NEXT: [[CMOV64rr:%[0-9]+]]:gr64 = CMOV64rr [[SUBREG_TO_REG]], [[COPY]], 8, implicit $eflags170    ; CHECK-NEXT: MOV64mr [[COPY1]], 1, $noreg, 0, $noreg, killed [[CMOV64rr]] :: (store (s64) into %ir.0)171    ; CHECK-NEXT: $rax = COPY [[MOV64rm]]172    ; CHECK-NEXT: RET 0, $rax173    %1:gr64 = COPY $rsi174    %0:gr64 = COPY $rdi175    %4:gr64 = MOV64rm %0, 1, $noreg, 0, $noreg :: (load (s64) from %ir.0)176    %5:gr32 = COPY %4.sub_32bit177    %6:gr32 = AND32ri8 %5, 3, implicit-def dead $eflags178    %7:gr64 = SUBREG_TO_REG 0, killed %6, %subreg.sub_32bit179    TEST64rr %7, %7, implicit-def $eflags180    %8:gr64 = CMOV64rr %7, %1, 8, implicit $eflags181    MOV64mr %0, 1, $noreg, 0, $noreg, killed %8 :: (store (s64) into %ir.0)182    $rax = COPY %4183    RET 0, $rax184 185...186---187name:            test_not_erased_when_eflags_change188alignment:       16189tracksDebugUserValues: false190registers:191  - { id: 0, class: gr64, preferred-register: '' }192  - { id: 1, class: gr64, preferred-register: '' }193  - { id: 2, class: gr64, preferred-register: '' }194  - { id: 3, class: gr64, preferred-register: '' }195  - { id: 4, class: gr64, preferred-register: '' }196  - { id: 5, class: gr64, preferred-register: '' }197  - { id: 6, class: gr32, preferred-register: '' }198  - { id: 7, class: gr32, preferred-register: '' }199  - { id: 8, class: gr64, preferred-register: '' }200  - { id: 9, class: gr64, preferred-register: '' }201  - { id: 10, class: gr64, preferred-register: '' }202liveins:203  - { reg: '$rdi', virtual-reg: '%0' }204  - { reg: '$rsi', virtual-reg: '%1' }205  - { reg: '$rcx', virtual-reg: '%3' }206  - { reg: '$r8', virtual-reg: '%4' }207frameInfo:208  maxAlignment:    1209machineFunctionInfo: {}210body:             |211  bb.0 (%ir-block.5):212    liveins: $rdi, $rsi, $rcx, $r8213 214    ; CHECK-LABEL: name: test_not_erased_when_eflags_change215    ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $r8216    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rcx217    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rsi218    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr64 = COPY $rdi219    ; CHECK-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY3]], 1, $noreg, 0, $noreg :: (load (s64) from %ir.0)220    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr32 = COPY [[MOV64rm]].sub_32bit221    ; CHECK-NEXT: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[COPY4]], 3, implicit-def dead $eflags222    ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, killed [[AND32ri8_]], %subreg.sub_32bit223    ; CHECK-NEXT: [[XOR64ri8_:%[0-9]+]]:gr64 = XOR64ri8 [[COPY1]], 5, implicit-def dead $eflags224    ; CHECK-NEXT: TEST64rr [[SUBREG_TO_REG]], [[SUBREG_TO_REG]], implicit-def $eflags225    ; CHECK-NEXT: [[CMOV64rr:%[0-9]+]]:gr64 = CMOV64rr [[SUBREG_TO_REG]], [[COPY2]], 4, implicit $eflags226    ; CHECK-NEXT: MOV64mr [[COPY3]], 1, $noreg, 0, $noreg, killed [[CMOV64rr]] :: (store (s64) into %ir.0)227    ; CHECK-NEXT: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, killed [[XOR64ri8_]] :: (store (s64) into %ir.4)228    ; CHECK-NEXT: RET 0229    %4:gr64 = COPY $r8230    %3:gr64 = COPY $rcx231    %1:gr64 = COPY $rsi232    %0:gr64 = COPY $rdi233    %5:gr64 = MOV64rm %0, 1, $noreg, 0, $noreg :: (load (s64) from %ir.0)234    %6:gr32 = COPY %5.sub_32bit235    %7:gr32 = AND32ri8 %6, 3, implicit-def dead $eflags236    %8:gr64 = SUBREG_TO_REG 0, killed %7, %subreg.sub_32bit237    %9:gr64 = XOR64ri8 %3, 5, implicit-def dead $eflags238    TEST64rr %8, %8, implicit-def $eflags239    %10:gr64 = CMOV64rr %8, %1, 4, implicit $eflags240    MOV64mr %0, 1, $noreg, 0, $noreg, killed %10 :: (store (s64) into %ir.0)241    MOV64mr %4, 1, $noreg, 0, $noreg, killed %9 :: (store (s64) into %ir.4)242    RET 0243 244...245---246name:            erase_test16247alignment:       16248exposesReturnsTwice: false249legalized:       false250regBankSelected: false251selected:        false252failedISel:      false253tracksRegLiveness: true254hasWinCFI:       false255callsEHReturn:   false256callsUnwindInit: false257hasEHContTarget: false258hasEHScopes:     false259hasEHFunclets:   false260isOutlined:      false261debugInstrRef:   true262failsVerification: false263tracksDebugUserValues: false264registers:265  - { id: 0, class: gr32, preferred-register: '' }266  - { id: 1, class: gr32, preferred-register: '' }267  - { id: 2, class: gr64, preferred-register: '' }268  - { id: 3, class: gr16, preferred-register: '' }269  - { id: 4, class: gr16, preferred-register: '' }270  - { id: 5, class: gr32, preferred-register: '' }271  - { id: 6, class: gr32, preferred-register: '' }272  - { id: 7, class: gr16, preferred-register: '' }273liveins:274  - { reg: '$edi', virtual-reg: '%0' }275  - { reg: '$esi', virtual-reg: '%1' }276  - { reg: '$rdx', virtual-reg: '%2' }277frameInfo:278  isFrameAddressTaken: false279  isReturnAddressTaken: false280  hasStackMap:     false281  hasPatchPoint:   false282  stackSize:       0283  offsetAdjustment: 0284  maxAlignment:    1285  adjustsStack:    false286  hasCalls:        false287  stackProtector:  ''288  functionContext: ''289  maxCallFrameSize: 4294967295290  cvBytesOfCalleeSavedRegisters: 0291  hasOpaqueSPAdjustment: false292  hasVAStart:      false293  hasMustTailInVarArgFunc: false294  hasTailCall:     false295  localFrameSize:  0296  savePoint:       []297  restorePoint:    []298fixedStack:      []299stack:           []300entry_values:    []301callSites:       []302debugValueSubstitutions: []303constants:       []304machineFunctionInfo: {}305body:             |306  ; CHECK-LABEL: name: erase_test16307  ; CHECK: bb.0.entry:308  ; CHECK-NEXT:   successors: %bb.1(0x60000000), %bb.3(0x20000000)309  ; CHECK-NEXT:   liveins: $edi, $esi, $rdx310  ; CHECK-NEXT: {{  $}}311  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr64 = COPY $rdx312  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY $esi313  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY $edi314  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit315  ; CHECK-NEXT:   TEST16rr [[COPY3]], [[COPY3]], implicit-def $eflags316  ; CHECK-NEXT:   JCC_1 %bb.3, 4, implicit $eflags317  ; CHECK-NEXT:   JMP_1 %bb.1318  ; CHECK-NEXT: {{  $}}319  ; CHECK-NEXT: bb.1.entry:320  ; CHECK-NEXT:   successors: %bb.2(0x55555555), %bb.3(0x2aaaaaab)321  ; CHECK-NEXT: {{  $}}322  ; CHECK-NEXT:   [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[COPY1]], 123, implicit-def $eflags323  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gr16 = COPY [[AND32ri]].sub_16bit324  ; CHECK-NEXT:   JCC_1 %bb.3, 5, implicit $eflags325  ; CHECK-NEXT:   JMP_1 %bb.2326  ; CHECK-NEXT: {{  $}}327  ; CHECK-NEXT: bb.2.if.then:328  ; CHECK-NEXT:   successors: %bb.3(0x80000000)329  ; CHECK-NEXT: {{  $}}330  ; CHECK-NEXT:   MOV16mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY3]] :: (store (s16) into %ir.2, align 4)331  ; CHECK-NEXT: {{  $}}332  ; CHECK-NEXT: bb.3.if.end:333  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags334  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:gr16 = COPY [[MOV32r0_]].sub_16bit335  ; CHECK-NEXT:   $ax = COPY [[COPY5]]336  ; CHECK-NEXT:   RET 0, $ax337  bb.0.entry:338    successors: %bb.3(0x60000000), %bb.2(0x20000000)339    liveins: $edi, $esi, $rdx340 341    %2:gr64 = COPY $rdx342    %1:gr32 = COPY $esi343    %0:gr32 = COPY $edi344    %3:gr16 = COPY %0.sub_16bit345    TEST16rr %3, %3, implicit-def $eflags346    JCC_1 %bb.2, 4, implicit $eflags347    JMP_1 %bb.3348 349  bb.3.entry:350    successors: %bb.1(0x55555555), %bb.2(0x2aaaaaab)351 352    %5:gr32 = AND32ri %1, 123, implicit-def dead $eflags353    %4:gr16 = COPY %5.sub_16bit354    TEST16rr %4, %4, implicit-def $eflags355    JCC_1 %bb.2, 5, implicit $eflags356    JMP_1 %bb.1357 358  bb.1.if.then:359    successors: %bb.2(0x80000000)360 361    MOV16mr %2, 1, $noreg, 0, $noreg, %3 :: (store (s16) into %ir.2, align 4)362 363  bb.2.if.end:364    %6:gr32 = MOV32r0 implicit-def dead $eflags365    %7:gr16 = COPY %6.sub_16bit366    $ax = COPY %7367    RET 0, $ax368 369...370---371name:            erase_test16_bigimm372alignment:       16373exposesReturnsTwice: false374legalized:       false375regBankSelected: false376selected:        false377failedISel:      false378tracksRegLiveness: true379hasWinCFI:       false380callsEHReturn:   false381callsUnwindInit: false382hasEHContTarget: false383hasEHScopes:     false384hasEHFunclets:   false385isOutlined:      false386debugInstrRef:   true387failsVerification: false388tracksDebugUserValues: false389registers:390  - { id: 0, class: gr32, preferred-register: '' }391  - { id: 1, class: gr32, preferred-register: '' }392  - { id: 2, class: gr32, preferred-register: '' }393  - { id: 3, class: gr64, preferred-register: '' }394  - { id: 4, class: gr16, preferred-register: '' }395  - { id: 5, class: gr16, preferred-register: '' }396  - { id: 6, class: gr32, preferred-register: '' }397  - { id: 7, class: gr16, preferred-register: '' }398liveins:399  - { reg: '$edi', virtual-reg: '%1' }400  - { reg: '$esi', virtual-reg: '%2' }401  - { reg: '$rdx', virtual-reg: '%3' }402frameInfo:403  isFrameAddressTaken: false404  isReturnAddressTaken: false405  hasStackMap:     false406  hasPatchPoint:   false407  stackSize:       0408  offsetAdjustment: 0409  maxAlignment:    1410  adjustsStack:    false411  hasCalls:        false412  stackProtector:  ''413  functionContext: ''414  maxCallFrameSize: 4294967295415  cvBytesOfCalleeSavedRegisters: 0416  hasOpaqueSPAdjustment: false417  hasVAStart:      false418  hasMustTailInVarArgFunc: false419  hasTailCall:     false420  localFrameSize:  0421  savePoint:       []422  restorePoint:    []423fixedStack:      []424stack:           []425entry_values:    []426callSites:       []427debugValueSubstitutions: []428constants:       []429machineFunctionInfo: {}430body:             |431  ; CHECK-LABEL: name: erase_test16_bigimm432  ; CHECK: bb.0.entry:433  ; CHECK-NEXT:   successors: %bb.1(0x60000000), %bb.3(0x20000000)434  ; CHECK-NEXT:   liveins: $edi, $esi, $rdx435  ; CHECK-NEXT: {{  $}}436  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr64 = COPY $rdx437  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY $esi438  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY $edi439  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit440  ; CHECK-NEXT:   TEST16rr [[COPY3]], [[COPY3]], implicit-def $eflags441  ; CHECK-NEXT:   JCC_1 %bb.3, 4, implicit $eflags442  ; CHECK-NEXT:   JMP_1 %bb.1443  ; CHECK-NEXT: {{  $}}444  ; CHECK-NEXT: bb.1.entry:445  ; CHECK-NEXT:   successors: %bb.2(0x55555555), %bb.3(0x2aaaaaab)446  ; CHECK-NEXT: {{  $}}447  ; CHECK-NEXT:   [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[COPY1]], 123456, implicit-def dead $eflags448  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gr16 = COPY [[AND32ri]].sub_16bit449  ; CHECK-NEXT:   TEST16rr [[COPY4]], [[COPY4]], implicit-def $eflags450  ; CHECK-NEXT:   JCC_1 %bb.3, 5, implicit $eflags451  ; CHECK-NEXT:   JMP_1 %bb.2452  ; CHECK-NEXT: {{  $}}453  ; CHECK-NEXT: bb.2.if.then:454  ; CHECK-NEXT:   successors: %bb.3(0x80000000)455  ; CHECK-NEXT: {{  $}}456  ; CHECK-NEXT:   MOV32mr [[COPY]], 1, $noreg, 0, $noreg, [[AND32ri]] :: (store (s32) into %ir.2)457  ; CHECK-NEXT: {{  $}}458  ; CHECK-NEXT: bb.3.if.end:459  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags460  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:gr16 = COPY [[MOV32r0_]].sub_16bit461  ; CHECK-NEXT:   $ax = COPY [[COPY5]]462  ; CHECK-NEXT:   RET 0, $ax463  bb.0.entry:464    successors: %bb.3(0x60000000), %bb.2(0x20000000)465    liveins: $edi, $esi, $rdx466 467    %3:gr64 = COPY $rdx468    %2:gr32 = COPY $esi469    %1:gr32 = COPY $edi470    %5:gr16 = COPY %1.sub_16bit471    TEST16rr %5, %5, implicit-def $eflags472    JCC_1 %bb.2, 4, implicit $eflags473    JMP_1 %bb.3474 475  bb.3.entry:476    successors: %bb.1(0x55555555), %bb.2(0x2aaaaaab)477 478    %0:gr32 = AND32ri %2, 123456, implicit-def dead $eflags479    %4:gr16 = COPY %0.sub_16bit480    TEST16rr %4, %4, implicit-def $eflags481    JCC_1 %bb.2, 5, implicit $eflags482    JMP_1 %bb.1483 484  bb.1.if.then:485    successors: %bb.2(0x80000000)486 487    MOV32mr %3, 1, $noreg, 0, $noreg, %0 :: (store (s32) into %ir.2)488 489  bb.2.if.end:490    %6:gr32 = MOV32r0 implicit-def dead $eflags491    %7:gr16 = COPY %6.sub_16bit492    $ax = COPY %7493    RET 0, $ax494 495...496---497name:            erase_test16_sf498alignment:       16499exposesReturnsTwice: false500legalized:       false501regBankSelected: false502selected:        false503failedISel:      false504tracksRegLiveness: true505hasWinCFI:       false506callsEHReturn:   false507callsUnwindInit: false508hasEHContTarget: false509hasEHScopes:     false510hasEHFunclets:   false511isOutlined:      false512debugInstrRef:   true513failsVerification: false514tracksDebugUserValues: false515registers:516  - { id: 0, class: gr16, preferred-register: '' }517  - { id: 1, class: gr32, preferred-register: '' }518  - { id: 2, class: gr32, preferred-register: '' }519  - { id: 3, class: gr64, preferred-register: '' }520  - { id: 4, class: gr16, preferred-register: '' }521  - { id: 5, class: gr32, preferred-register: '' }522  - { id: 6, class: gr32, preferred-register: '' }523  - { id: 7, class: gr16, preferred-register: '' }524liveins:525  - { reg: '$edi', virtual-reg: '%1' }526  - { reg: '$esi', virtual-reg: '%2' }527  - { reg: '$rdx', virtual-reg: '%3' }528frameInfo:529  isFrameAddressTaken: false530  isReturnAddressTaken: false531  hasStackMap:     false532  hasPatchPoint:   false533  stackSize:       0534  offsetAdjustment: 0535  maxAlignment:    1536  adjustsStack:    false537  hasCalls:        false538  stackProtector:  ''539  functionContext: ''540  maxCallFrameSize: 4294967295541  cvBytesOfCalleeSavedRegisters: 0542  hasOpaqueSPAdjustment: false543  hasVAStart:      false544  hasMustTailInVarArgFunc: false545  hasTailCall:     false546  localFrameSize:  0547  savePoint:       []548  restorePoint:    []549fixedStack:      []550stack:           []551entry_values:    []552callSites:       []553debugValueSubstitutions: []554constants:       []555machineFunctionInfo: {}556body:             |557  ; CHECK-LABEL: name: erase_test16_sf558  ; CHECK: bb.0.entry:559  ; CHECK-NEXT:   successors: %bb.1(0x60000000), %bb.3(0x20000000)560  ; CHECK-NEXT:   liveins: $edi, $esi, $rdx561  ; CHECK-NEXT: {{  $}}562  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr64 = COPY $rdx563  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr32 = COPY $esi564  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gr32 = COPY $edi565  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit566  ; CHECK-NEXT:   TEST16rr [[COPY3]], [[COPY3]], implicit-def $eflags567  ; CHECK-NEXT:   JCC_1 %bb.3, 4, implicit $eflags568  ; CHECK-NEXT:   JMP_1 %bb.1569  ; CHECK-NEXT: {{  $}}570  ; CHECK-NEXT: bb.1.entry:571  ; CHECK-NEXT:   successors: %bb.2(0x55555555), %bb.3(0x2aaaaaab)572  ; CHECK-NEXT: {{  $}}573  ; CHECK-NEXT:   [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[COPY1]], 1234, implicit-def dead $eflags574  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gr16 = COPY [[AND32ri]].sub_16bit575  ; CHECK-NEXT:   TEST16rr [[COPY4]], [[COPY4]], implicit-def $eflags576  ; CHECK-NEXT:   JCC_1 %bb.3, 9, implicit $eflags577  ; CHECK-NEXT:   JMP_1 %bb.2578  ; CHECK-NEXT: {{  $}}579  ; CHECK-NEXT: bb.2.if.then:580  ; CHECK-NEXT:   successors: %bb.3(0x80000000)581  ; CHECK-NEXT: {{  $}}582  ; CHECK-NEXT:   MOV16mr [[COPY]], 1, $noreg, 0, $noreg, [[COPY4]] :: (store (s16) into %ir.2, align 4)583  ; CHECK-NEXT: {{  $}}584  ; CHECK-NEXT: bb.3.if.end:585  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags586  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:gr16 = COPY [[MOV32r0_]].sub_16bit587  ; CHECK-NEXT:   $ax = COPY [[COPY5]]588  ; CHECK-NEXT:   RET 0, $ax589  bb.0.entry:590    successors: %bb.3(0x60000000), %bb.2(0x20000000)591    liveins: $edi, $esi, $rdx592 593    %3:gr64 = COPY $rdx594    %2:gr32 = COPY $esi595    %1:gr32 = COPY $edi596    %4:gr16 = COPY %1.sub_16bit597    TEST16rr %4, %4, implicit-def $eflags598    JCC_1 %bb.2, 4, implicit $eflags599    JMP_1 %bb.3600 601  bb.3.entry:602    successors: %bb.1(0x55555555), %bb.2(0x2aaaaaab)603 604    %5:gr32 = AND32ri %2, 1234, implicit-def dead $eflags605    %0:gr16 = COPY %5.sub_16bit606    TEST16rr %0, %0, implicit-def $eflags607    JCC_1 %bb.2, 9, implicit $eflags608    JMP_1 %bb.1609 610  bb.1.if.then:611    successors: %bb.2(0x80000000)612 613    MOV16mr %3, 1, $noreg, 0, $noreg, %0 :: (store (s16) into %ir.2, align 4)614 615  bb.2.if.end:616    %6:gr32 = MOV32r0 implicit-def dead $eflags617    %7:gr16 = COPY %6.sub_16bit618    $ax = COPY %7619    RET 0, $ax620 621...622