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1; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s2 3; rdar://118976774 5;CHECK-LABEL: intrin_pmov:6;CHECK: pmovzxbw (%{{.*}}), %xmm07;CHECK-NEXT: movdqu8;CHECK-NEXT: ret9define void @intrin_pmov(ptr noalias %dest, ptr noalias %src) nounwind uwtable ssp {10 %1 = load <2 x i64>, ptr %src, align 1611 %2 = bitcast <2 x i64> %1 to <16 x i8>12 %3 = tail call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %2) nounwind13 %4 = bitcast <8 x i16> %3 to <16 x i8>14 tail call void @llvm.x86.sse2.storeu.dq(ptr %dest, <16 x i8> %4) nounwind15 ret void16}17 18declare <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8>) nounwind readnone19declare void @llvm.x86.sse2.storeu.dq(ptr, <16 x i8>) nounwind20 21; rdar://1524579422 23define <4 x i32> @foo0(double %v.coerce) nounwind ssp {24; CHECK-LABEL: foo025; CHECK: pmovzxwd %xmm0, %xmm026; CHECK-NEXT: ret27 %tmp = bitcast double %v.coerce to <4 x i16>28 %tmp1 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>29 %tmp2 = tail call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp1) nounwind30 ret <4 x i32> %tmp231}32 33define <8 x i16> @foo1(double %v.coerce) nounwind ssp {34; CHECK-LABEL: foo135; CHECK: pmovzxbw %xmm0, %xmm036; CHECK-NEXT: ret37 %tmp = bitcast double %v.coerce to <8 x i8>38 %tmp1 = shufflevector <8 x i8> %tmp, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>39 %tmp2 = tail call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %tmp1)40 ret <8 x i16> %tmp241}42 43declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone44