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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 | FileCheck %s3; RUN: opt -passes=instsimplify -disable-output < %s4 5define <8 x ptr> @SHUFF0(<4 x ptr> %ptrv) nounwind {6; CHECK-LABEL: SHUFF0:7; CHECK: # %bb.0: # %entry8; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,1,2]9; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,1,1]10; CHECK-NEXT: movdqa %xmm2, %xmm011; CHECK-NEXT: retl12entry:13 %G = shufflevector <4 x ptr> %ptrv, <4 x ptr> %ptrv, <8 x i32> <i32 2, i32 7, i32 1, i32 2, i32 4, i32 5, i32 1, i32 1>14 ret <8 x ptr> %G15}16 17define <4 x ptr> @SHUFF1(<4 x ptr> %ptrv) nounwind {18; CHECK-LABEL: SHUFF1:19; CHECK: # %bb.0: # %entry20; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,3,2]21; CHECK-NEXT: retl22entry:23 %G = shufflevector <4 x ptr> %ptrv, <4 x ptr> %ptrv, <4 x i32> <i32 2, i32 7, i32 7, i32 2>24 ret <4 x ptr> %G25}26 27define <4 x ptr> @SHUFF3(<4 x ptr> %ptrv) nounwind {28; CHECK-LABEL: SHUFF3:29; CHECK: # %bb.0: # %entry30; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,1,2]31; CHECK-NEXT: retl32entry:33 %G = shufflevector <4 x ptr> %ptrv, <4 x ptr> undef, <4 x i32> <i32 2, i32 7, i32 1, i32 2>34 ret <4 x ptr> %G35}36 37define <4 x ptr> @LOAD0(ptr %p) nounwind {38; CHECK-LABEL: LOAD0:39; CHECK: # %bb.0: # %entry40; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax41; CHECK-NEXT: movaps (%eax), %xmm042; CHECK-NEXT: retl43entry:44 %G = load <4 x ptr>, ptr %p45 ret <4 x ptr> %G46}47 48define <4 x ptr> @LOAD1(ptr %p) nounwind {49; CHECK-LABEL: LOAD1:50; CHECK: # %bb.0: # %entry51; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax52; CHECK-NEXT: movdqa (%eax), %xmm053; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,0,3]54; CHECK-NEXT: movdqa %xmm1, (%eax)55; CHECK-NEXT: retl56entry:57 %G = load <4 x ptr>, ptr %p58 %T = shufflevector <4 x ptr> %G, <4 x ptr> %G, <4 x i32> <i32 7, i32 1, i32 4, i32 3>59 store <4 x ptr> %T, ptr %p60 ret <4 x ptr> %G61}62 63define <4 x ptr> @LOAD2(ptr %p) nounwind {64; CHECK-LABEL: LOAD2:65; CHECK: # %bb.0: # %entry66; CHECK-NEXT: subl $28, %esp67; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax68; CHECK-NEXT: movaps (%eax), %xmm069; CHECK-NEXT: movaps %xmm0, (%esp)70; CHECK-NEXT: addl $28, %esp71; CHECK-NEXT: retl72entry:73 %I = alloca <4 x ptr>74 %G = load <4 x ptr>, ptr %p75 store <4 x ptr> %G, ptr %I76 %Z = load <4 x ptr>, ptr %I77 ret <4 x ptr> %Z78}79 80define <4 x i32> @INT2PTR0(ptr %p) nounwind {81; CHECK-LABEL: INT2PTR0:82; CHECK: # %bb.0: # %entry83; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax84; CHECK-NEXT: movaps (%eax), %xmm085; CHECK-NEXT: retl86entry:87 %G = load <4 x ptr>, ptr %p88 %K = ptrtoint <4 x ptr> %G to <4 x i32>89 ret <4 x i32> %K90}91 92define <4 x ptr> @INT2PTR1(ptr %p) nounwind {93; CHECK-LABEL: INT2PTR1:94; CHECK: # %bb.0: # %entry95; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax96; CHECK-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero97; CHECK-NEXT: retl98entry:99 %G = load <4 x i8>, ptr %p100 %K = inttoptr <4 x i8> %G to <4 x ptr>101 ret <4 x ptr> %K102}103 104define <4 x ptr> @BITCAST0(ptr %p) nounwind {105; CHECK-LABEL: BITCAST0:106; CHECK: # %bb.0: # %entry107; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax108; CHECK-NEXT: movaps (%eax), %xmm0109; CHECK-NEXT: retl110entry:111 %G = load <4 x ptr>, ptr %p112 %T = bitcast <4 x ptr> %G to <4 x ptr>113 ret <4 x ptr> %T114}115 116define <2 x ptr> @BITCAST1(ptr %p) nounwind {117; CHECK-LABEL: BITCAST1:118; CHECK: # %bb.0: # %entry119; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax120; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero121; CHECK-NEXT: retl122entry:123 %G = load <2 x ptr>, ptr %p124 %T = bitcast <2 x ptr> %G to <2 x ptr>125 ret <2 x ptr> %T126}127 128define <4 x i32> @ICMP0(ptr %p0, ptr %p1) nounwind {129; CHECK-LABEL: ICMP0:130; CHECK: # %bb.0: # %entry131; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax132; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx133; CHECK-NEXT: movdqa (%ecx), %xmm0134; CHECK-NEXT: pcmpgtd (%eax), %xmm0135; CHECK-NEXT: movaps {{.*#+}} xmm1 = [9,8,7,6]136; CHECK-NEXT: blendvps %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1137; CHECK-NEXT: movaps %xmm1, %xmm0138; CHECK-NEXT: retl139entry:140 %g0 = load <4 x ptr>, ptr %p0141 %g1 = load <4 x ptr>, ptr %p1142 %k = icmp sgt <4 x ptr> %g0, %g1143 %j = select <4 x i1> %k, <4 x i32> <i32 0, i32 1, i32 2, i32 4>, <4 x i32> <i32 9, i32 8, i32 7, i32 6>144 ret <4 x i32> %j145}146 147define <4 x i32> @ICMP1(ptr %p0, ptr %p1) nounwind {148; CHECK-LABEL: ICMP1:149; CHECK: # %bb.0: # %entry150; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax151; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx152; CHECK-NEXT: movdqa (%ecx), %xmm0153; CHECK-NEXT: pcmpeqd (%eax), %xmm0154; CHECK-NEXT: movaps {{.*#+}} xmm1 = [9,8,7,6]155; CHECK-NEXT: blendvps %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1156; CHECK-NEXT: movaps %xmm1, %xmm0157; CHECK-NEXT: retl158entry:159 %g0 = load <4 x ptr>, ptr %p0160 %g1 = load <4 x ptr>, ptr %p1161 %k = icmp eq <4 x ptr> %g0, %g1162 %j = select <4 x i1> %k, <4 x i32> <i32 0, i32 1, i32 2, i32 4>, <4 x i32> <i32 9, i32 8, i32 7, i32 6>163 ret <4 x i32> %j164}165 166