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1; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=nocona | FileCheck %s --check-prefix=PRESCOTT2; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=nehalem | FileCheck %s --check-prefix=NEHALEM3 4;;; TODO: (1) Some of the loads and stores are certainly unaligned and (2) the first load and first5;;; store overlap with the second load and second store respectively.6;;;7;;; Is either of these sequences ideal? 8 9define float @foo(ptr nocapture %buf, float %a, float %b) nounwind uwtable {10; PRESCOTT-LABEL: foo:11; PRESCOTT: # %bb.0: # %entry12; PRESCOTT-NEXT: movq .Ltmp0+14(%rip), %rax13; PRESCOTT-NEXT: movq %rax, 14(%rdi)14; PRESCOTT-NEXT: movq .Ltmp0+8(%rip), %rax15; PRESCOTT-NEXT: movq %rax, 8(%rdi)16; PRESCOTT-NEXT: movq .Ltmp0(%rip), %rax17; PRESCOTT-NEXT: movq %rax, (%rdi)18;19; NEHALEM-LABEL: foo:20; NEHALEM: # %bb.0: # %entry21; NEHALEM-NEXT: movq .Ltmp0+14(%rip), %rax22; NEHALEM-NEXT: movq %rax, 14(%rdi)23; NEHALEM-NEXT: movups .Ltmp0(%rip), %xmm224; NEHALEM-NEXT: movups %xmm2, (%rdi)25 26entry:27 tail call void @llvm.memcpy.p0.p0.i64(ptr %buf, ptr blockaddress(@foo, %out), i64 22, i1 false)28 br label %out29 30out: ; preds = %entry31 %add = fadd float %a, %b32 ret float %add33}34 35declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind36