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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s3 4define <4 x i32> @insert_v2i32_in_v4i32_at_0(<4 x i32> %a, <2 x i32> %b) {5; CHECK-LABEL: insert_v2i32_in_v4i32_at_0:6; CHECK: # %bb.0:7; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]8; CHECK-NEXT: retq9 %result = tail call <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32> %a, <2 x i32> %b, i64 0)10 ret <4 x i32> %result11}12 13define <4 x i32> @insert_v2i32_in_v4i32_at_2(<4 x i32> %a, <2 x i32> %b) {14; CHECK-LABEL: insert_v2i32_in_v4i32_at_2:15; CHECK: # %bb.0:16; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]17; CHECK-NEXT: retq18 %result = tail call <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32> %a, <2 x i32> %b, i64 2)19 ret <4 x i32> %result20}21 22define <4 x float> @insert_v2f32_in_v4f32_at_0(<4 x float> %a, <2 x float> %b) {23; CHECK-LABEL: insert_v2f32_in_v4f32_at_0:24; CHECK: # %bb.0:25; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]26; CHECK-NEXT: retq27 %result = tail call <4 x float> @llvm.vector.insert.v4float.v2float(<4 x float> %a, <2 x float> %b, i64 0)28 ret <4 x float> %result29}30 31define <8 x i32> @insert_v2i32_in_v8i32_at_0(<8 x i32> %a, <2 x i32> %b) {32; CHECK-LABEL: insert_v2i32_in_v8i32_at_0:33; CHECK: # %bb.0:34; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]35; CHECK-NEXT: retq36 %result = tail call <8 x i32> @llvm.vector.insert.v8i32.v2i32(<8 x i32> %a, <2 x i32> %b, i64 0)37 ret <8 x i32> %result38}39 40define <8 x i32> @insert_v2i32_in_v8i32_at_6(<8 x i32> %a, <2 x i32> %b) {41; CHECK-LABEL: insert_v2i32_in_v8i32_at_6:42; CHECK: # %bb.0:43; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]44; CHECK-NEXT: retq45 %result = tail call <8 x i32> @llvm.vector.insert.v8i32.v2i32(<8 x i32> %a, <2 x i32> %b, i64 6)46 ret <8 x i32> %result47}48