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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X863; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X644 5; Test for incorrect vector codegen due to bad handling of splats of binops containing undefs6define i32 @PR134602(i16 %a0) {7; X86-LABEL: PR134602:8; X86: # %bb.0:9; X86-NEXT: movl {{[0-9]+}}(%esp), %eax10; X86-NEXT: orl $1, %eax11; X86-NEXT: addl $3, %eax12; X86-NEXT: cwtl13; X86-NEXT: retl14;15; X64-LABEL: PR134602:16; X64: # %bb.0:17; X64-NEXT: movzwl %di, %eax18; X64-NEXT: movd %eax, %xmm019; X64-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm020; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]21; X64-NEXT: paddw %xmm0, %xmm122; X64-NEXT: movdqa %xmm1, %xmm023; X64-NEXT: psrld $16, %xmm024; X64-NEXT: paddw %xmm1, %xmm025; X64-NEXT: movd %xmm0, %eax26; X64-NEXT: cwtl27; X64-NEXT: retq28 %splat= insertelement <4 x i16> zeroinitializer, i16 %a0, i64 029 %mul = mul <4 x i16> %splat, <i16 1, i16 1, i16 0, i16 0>30 %or = or <4 x i16> splat (i16 1), %mul31 %reduce = call i16 @llvm.vector.reduce.add.v4i16(<4 x i16> %or)32 %ret_32 = sext i16 %reduce to i3233 ret i32 %ret_3234}35