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1; RUN: llc -O3 -disable-peephole -mcpu=corei7-avx -mattr=+avx < %s | FileCheck %s2 3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"4target triple = "x86_64-unknown-unknown"5 6; pr18846 - needless avx spill/reload7; Test for unnecessary repeated spills due to eliminateRedundantSpills failing8; to recognise unaligned ymm load/stores to the stack.9; Bugpoint reduced testcase.10 11;CHECK-LABEL: _Z16opt_kernel_cachePfS_S_12;CHECK-NOT: vmovups {{.*#+}} 32-byte Folded Spill13;CHECK-NOT: vmovups {{.*#+}} 32-byte Folded Reload14 15; Function Attrs: uwtable16define void @_Z16opt_kernel_cachePfS_S_(i1 %arg) #0 {17entry:18 br label %for.body2919 20for.body29: ; preds = %for.body29, %entry21 br i1 %arg, label %for.body29, label %for.body6522 23for.body65: ; preds = %for.body2924 %0 = load float, ptr undef, align 4, !tbaa !125 %vecinit7.i4448 = insertelement <8 x float> undef, float %0, i32 726 %1 = load float, ptr null, align 4, !tbaa !127 %vecinit7.i4304 = insertelement <8 x float> undef, float %1, i32 728 %2 = load float, ptr undef, align 4, !tbaa !129 %vecinit7.i4196 = insertelement <8 x float> undef, float %2, i32 730 %3 = or i64 0, 1631 %add.ptr111.sum4096 = add i64 %3, 032 %4 = load <8 x float>, ptr null, align 16, !tbaa !533 %add.ptr162 = getelementptr inbounds [65536 x float], ptr null, i64 0, i64 %add.ptr111.sum409634 %5 = load <8 x float>, ptr %add.ptr162, align 16, !tbaa !535 %add.ptr158.sum40975066 = or i64 %add.ptr111.sum4096, 836 %add.ptr183 = getelementptr inbounds [65536 x float], ptr null, i64 0, i64 %add.ptr158.sum4097506637 %6 = load <8 x float>, ptr %add.ptr183, align 16, !tbaa !538 %add.ptr200.sum40995067 = or i64 undef, 839 %add.ptr225 = getelementptr inbounds [65536 x float], ptr null, i64 0, i64 %add.ptr200.sum4099506740 %7 = load <8 x float>, ptr %add.ptr225, align 4, !tbaa !541 %8 = load <8 x float>, ptr undef, align 16, !tbaa !542 %add.ptr242.sum41015068 = or i64 0, 843 %add.ptr267 = getelementptr inbounds [65536 x float], ptr null, i64 0, i64 %add.ptr242.sum4101506844 %9 = load <8 x float>, ptr %add.ptr267, align 4, !tbaa !545 %mul.i4690 = fmul <8 x float> %7, undef46 %add.i4665 = fadd <8 x float> undef, undef47 %mul.i4616 = fmul <8 x float> %8, undef48 %mul.i4598 = fmul <8 x float> undef, undef49 %add.i4597 = fadd <8 x float> undef, %mul.i459850 %mul.i4594 = fmul <8 x float> %6, undef51 %add.i4593 = fadd <8 x float> undef, %mul.i459452 %mul.i4578 = fmul <8 x float> %9, undef53 %add.i4577 = fadd <8 x float> %add.i4593, %mul.i457854 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4577) #155 %10 = load <8 x float>, ptr null, align 16, !tbaa !556 %11 = load <8 x float>, ptr undef, align 16, !tbaa !557 %mul.i4564 = fmul <8 x float> %4, undef58 %add.i4563 = fadd <8 x float> %10, %mul.i456459 %mul.i4560 = fmul <8 x float> %5, undef60 %add.i4559 = fadd <8 x float> %11, %mul.i456061 %add.i4547 = fadd <8 x float> %add.i4563, undef62 %mul.i4546 = fmul <8 x float> %7, undef63 %add.i4545 = fadd <8 x float> undef, %mul.i454664 %mul.i4544 = fmul <8 x float> %8, undef65 %add.i4543 = fadd <8 x float> %add.i4559, %mul.i454466 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4547) #167 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4545) #168 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4543) #169 %add.i4455 = fadd <8 x float> undef, undef70 %mul.i4454 = fmul <8 x float> undef, undef71 %add.i4453 = fadd <8 x float> undef, %mul.i445472 %mul.i4440 = fmul <8 x float> zeroinitializer, %vecinit7.i444873 %add.i4439 = fadd <8 x float> %add.i4455, %mul.i444074 %mul.i4438 = fmul <8 x float> %7, %vecinit7.i444875 %add.i4437 = fadd <8 x float> %add.i4453, %mul.i443876 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4439) #177 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4437) #178 %add.i4413 = fadd <8 x float> zeroinitializer, undef79 %mul.i4400 = fmul <8 x float> %8, undef80 %add.i4399 = fadd <8 x float> undef, %mul.i440081 %add.i4397 = fadd <8 x float> %add.i4413, zeroinitializer82 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> zeroinitializer) #183 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4399) #184 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4397) #185 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> undef) #186 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> undef) #187 %mul.i4330 = fmul <8 x float> %7, undef88 %add.i4329 = fadd <8 x float> undef, %mul.i433089 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4329) #190 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> undef) #191 %mul.i4312 = fmul <8 x float> %4, undef92 %add.i4311 = fadd <8 x float> undef, %mul.i431293 %mul.i4306 = fmul <8 x float> %6, undef94 %add.i4305 = fadd <8 x float> undef, %mul.i430695 %add.i4295 = fadd <8 x float> %add.i4311, undef96 %mul.i4294 = fmul <8 x float> %7, %vecinit7.i430497 %add.i4293 = fadd <8 x float> undef, %mul.i429498 %mul.i4292 = fmul <8 x float> %8, %vecinit7.i430499 %add.i4291 = fadd <8 x float> undef, %mul.i4292100 %mul.i4290 = fmul <8 x float> %9, %vecinit7.i4304101 %add.i4289 = fadd <8 x float> %add.i4305, %mul.i4290102 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4295) #1103 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4293) #1104 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4291) #1105 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4289) #1106 %12 = load <8 x float>, ptr undef, align 16, !tbaa !5107 %mul.i4274 = fmul <8 x float> undef, undef108 %add.i4273 = fadd <8 x float> %12, %mul.i4274109 %mul.i4258 = fmul <8 x float> %7, undef110 %add.i4257 = fadd <8 x float> %add.i4273, %mul.i4258111 %mul.i4254 = fmul <8 x float> %9, undef112 %add.i4253 = fadd <8 x float> undef, %mul.i4254113 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4257) #1114 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i4253) #1115 %mul.i = fmul <8 x float> %9, %vecinit7.i4196116 %add.i = fadd <8 x float> undef, %mul.i117 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> zeroinitializer) #1118 call void @llvm.x86.avx.storeu.ps.256(ptr undef, <8 x float> %add.i) #1119 unreachable120}121 122; Function Attrs: nounwind123declare void @llvm.x86.avx.storeu.ps.256(ptr, <8 x float>) #1124 125attributes #0 = { uwtable "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" }126attributes #1 = { nounwind }127 128!llvm.ident = !{!0}129 130!0 = !{!"clang version 3.5 "}131!1 = !{!2, !2, i64 0}132!2 = !{!"float", !3, i64 0}133!3 = !{!"omnipotent char", !4, i64 0}134!4 = !{!"Simple C/C++ TBAA"}135!5 = !{!3, !3, i64 0}136