43 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s3 4@d = global i32 0, align 45 6; Verify the sar happens before ecx is clobbered with the parameter being7; passed to fn38 9define i32 @fn4(i32 %i) #0 {10; CHECK-LABEL: fn4:11; CHECK: # %bb.0: # %entry12; CHECK-NEXT: pushl %esi13; CHECK-NEXT: subl $8, %esp14; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax15; CHECK-NEXT: movzbl d, %ecx16; CHECK-NEXT: movl %eax, %esi17; CHECK-NEXT: sarl %cl, %esi18; CHECK-NEXT: subl $8, %esp19; CHECK-NEXT: movl $2, %ecx20; CHECK-NEXT: movl $5, %edx21; CHECK-NEXT: pushl %eax22; CHECK-NEXT: pushl %esi23; CHECK-NEXT: calll fn3@PLT24; CHECK-NEXT: addl $16, %esp25; CHECK-NEXT: xorl %eax, %eax26; CHECK-NEXT: testl %esi, %esi27; CHECK-NEXT: setle %al28; CHECK-NEXT: addl $8, %esp29; CHECK-NEXT: popl %esi30; CHECK-NEXT: retl31entry:32 %0 = load i32, ptr @d, align 433 %shr = ashr i32 %i, %034 tail call fastcc void @fn3(i32 2, i32 5, i32 %shr, i32 %i)35 %cmp = icmp slt i32 %shr, 136 %. = zext i1 %cmp to i3237 ret i32 %.38}39 40declare void @fn3(i32 %p1, i32 %p2, i32 %p3, i32 %p4) #041 42attributes #0 = { nounwind }43