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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f -O0 | FileCheck %s3 4define <16 x float> @makefloat(float %f1, float %f2, float %f3, float %f4, float %f5, float %f6, float %f7, float %f8, float %f9, float %f10, float %f11, float %f12, float %f13, float %f14, float %f15, float %f16) #0 {5; CHECK-LABEL: makefloat:6; CHECK: # %bb.0: # %entry7; CHECK-NEXT: pushq %rbp8; CHECK-NEXT: .cfi_def_cfa_offset 169; CHECK-NEXT: .cfi_offset %rbp, -1610; CHECK-NEXT: movq %rsp, %rbp11; CHECK-NEXT: .cfi_def_cfa_register %rbp12; CHECK-NEXT: andq $-64, %rsp13; CHECK-NEXT: subq $256, %rsp # imm = 0x10014; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero15; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero16; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero17; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero18; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero19; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero20; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero21; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero22; CHECK-NEXT: vmovss %xmm0, {{[0-9]+}}(%rsp)23; CHECK-NEXT: vmovss %xmm1, {{[0-9]+}}(%rsp)24; CHECK-NEXT: vmovss %xmm2, {{[0-9]+}}(%rsp)25; CHECK-NEXT: vmovss %xmm3, {{[0-9]+}}(%rsp)26; CHECK-NEXT: vmovss %xmm4, {{[0-9]+}}(%rsp)27; CHECK-NEXT: vmovss %xmm5, {{[0-9]+}}(%rsp)28; CHECK-NEXT: vmovss %xmm6, {{[0-9]+}}(%rsp)29; CHECK-NEXT: vmovss %xmm7, {{[0-9]+}}(%rsp)30; CHECK-NEXT: vmovss {{.*#+}} xmm15 = mem[0],zero,zero,zero31; CHECK-NEXT: vmovss {{.*#+}} xmm14 = mem[0],zero,zero,zero32; CHECK-NEXT: vmovss {{.*#+}} xmm13 = mem[0],zero,zero,zero33; CHECK-NEXT: vmovss {{.*#+}} xmm12 = mem[0],zero,zero,zero34; CHECK-NEXT: vmovss {{.*#+}} xmm11 = mem[0],zero,zero,zero35; CHECK-NEXT: vmovss {{.*#+}} xmm10 = mem[0],zero,zero,zero36; CHECK-NEXT: vmovss {{.*#+}} xmm9 = mem[0],zero,zero,zero37; CHECK-NEXT: vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero38; CHECK-NEXT: vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero39; CHECK-NEXT: vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero40; CHECK-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero41; CHECK-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero42; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero43; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero44; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero45; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero46; CHECK-NEXT: vmovss %xmm15, {{[0-9]+}}(%rsp)47; CHECK-NEXT: vmovss %xmm14, {{[0-9]+}}(%rsp)48; CHECK-NEXT: vmovss %xmm13, {{[0-9]+}}(%rsp)49; CHECK-NEXT: vmovss %xmm12, {{[0-9]+}}(%rsp)50; CHECK-NEXT: vmovss %xmm11, {{[0-9]+}}(%rsp)51; CHECK-NEXT: vmovss %xmm10, {{[0-9]+}}(%rsp)52; CHECK-NEXT: vmovss %xmm9, {{[0-9]+}}(%rsp)53; CHECK-NEXT: vmovss %xmm8, {{[0-9]+}}(%rsp)54; CHECK-NEXT: vmovss %xmm7, {{[0-9]+}}(%rsp)55; CHECK-NEXT: vmovss %xmm6, {{[0-9]+}}(%rsp)56; CHECK-NEXT: vmovss %xmm5, {{[0-9]+}}(%rsp)57; CHECK-NEXT: vmovss %xmm4, {{[0-9]+}}(%rsp)58; CHECK-NEXT: vmovss %xmm3, {{[0-9]+}}(%rsp)59; CHECK-NEXT: vmovss %xmm2, {{[0-9]+}}(%rsp)60; CHECK-NEXT: vmovss %xmm1, {{[0-9]+}}(%rsp)61; CHECK-NEXT: vmovss %xmm0, {{[0-9]+}}(%rsp)62; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero63; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero64; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]65; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero66; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]67; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero68; CHECK-NEXT: vinsertps {{.*#+}} xmm1 = xmm0[0,1,2],xmm1[0]69; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero70; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero71; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[2,3]72; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero73; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]74; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero75; CHECK-NEXT: vinsertps {{.*#+}} xmm2 = xmm0[0,1,2],xmm2[0]76; CHECK-NEXT: # implicit-def: $ymm077; CHECK-NEXT: vmovaps %xmm2, %xmm078; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm179; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero80; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero81; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[2,3]82; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero83; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]84; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero85; CHECK-NEXT: vinsertps {{.*#+}} xmm2 = xmm0[0,1,2],xmm2[0]86; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero87; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero88; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3]89; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero90; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm3[0],xmm0[3]91; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero92; CHECK-NEXT: vinsertps {{.*#+}} xmm3 = xmm0[0,1,2],xmm3[0]93; CHECK-NEXT: # implicit-def: $ymm094; CHECK-NEXT: vmovaps %xmm3, %xmm095; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm296; CHECK-NEXT: # implicit-def: $zmm097; CHECK-NEXT: vmovaps %ymm2, %ymm098; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm099; CHECK-NEXT: vmovaps %zmm0, {{[0-9]+}}(%rsp)100; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %zmm0101; CHECK-NEXT: movq %rbp, %rsp102; CHECK-NEXT: popq %rbp103; CHECK-NEXT: .cfi_def_cfa %rsp, 8104; CHECK-NEXT: retq105entry:106 %__A.addr.i = alloca float, align 4107 %__B.addr.i = alloca float, align 4108 %__C.addr.i = alloca float, align 4109 %__D.addr.i = alloca float, align 4110 %__E.addr.i = alloca float, align 4111 %__F.addr.i = alloca float, align 4112 %__G.addr.i = alloca float, align 4113 %__H.addr.i = alloca float, align 4114 %__I.addr.i = alloca float, align 4115 %__J.addr.i = alloca float, align 4116 %__K.addr.i = alloca float, align 4117 %__L.addr.i = alloca float, align 4118 %__M.addr.i = alloca float, align 4119 %__N.addr.i = alloca float, align 4120 %__O.addr.i = alloca float, align 4121 %__P.addr.i = alloca float, align 4122 %.compoundliteral.i = alloca <16 x float>, align 64123 %f1.addr = alloca float, align 4124 %f2.addr = alloca float, align 4125 %f3.addr = alloca float, align 4126 %f4.addr = alloca float, align 4127 %f5.addr = alloca float, align 4128 %f6.addr = alloca float, align 4129 %f7.addr = alloca float, align 4130 %f8.addr = alloca float, align 4131 %f9.addr = alloca float, align 4132 %f10.addr = alloca float, align 4133 %f11.addr = alloca float, align 4134 %f12.addr = alloca float, align 4135 %f13.addr = alloca float, align 4136 %f14.addr = alloca float, align 4137 %f15.addr = alloca float, align 4138 %f16.addr = alloca float, align 4139 store float %f1, ptr %f1.addr, align 4140 store float %f2, ptr %f2.addr, align 4141 store float %f3, ptr %f3.addr, align 4142 store float %f4, ptr %f4.addr, align 4143 store float %f5, ptr %f5.addr, align 4144 store float %f6, ptr %f6.addr, align 4145 store float %f7, ptr %f7.addr, align 4146 store float %f8, ptr %f8.addr, align 4147 store float %f9, ptr %f9.addr, align 4148 store float %f10, ptr %f10.addr, align 4149 store float %f11, ptr %f11.addr, align 4150 store float %f12, ptr %f12.addr, align 4151 store float %f13, ptr %f13.addr, align 4152 store float %f14, ptr %f14.addr, align 4153 store float %f15, ptr %f15.addr, align 4154 store float %f16, ptr %f16.addr, align 4155 %0 = load float, ptr %f16.addr, align 4156 %1 = load float, ptr %f15.addr, align 4157 %2 = load float, ptr %f14.addr, align 4158 %3 = load float, ptr %f13.addr, align 4159 %4 = load float, ptr %f12.addr, align 4160 %5 = load float, ptr %f11.addr, align 4161 %6 = load float, ptr %f10.addr, align 4162 %7 = load float, ptr %f9.addr, align 4163 %8 = load float, ptr %f8.addr, align 4164 %9 = load float, ptr %f7.addr, align 4165 %10 = load float, ptr %f6.addr, align 4166 %11 = load float, ptr %f5.addr, align 4167 %12 = load float, ptr %f4.addr, align 4168 %13 = load float, ptr %f3.addr, align 4169 %14 = load float, ptr %f2.addr, align 4170 %15 = load float, ptr %f1.addr, align 4171 store float %0, ptr %__A.addr.i, align 4172 store float %1, ptr %__B.addr.i, align 4173 store float %2, ptr %__C.addr.i, align 4174 store float %3, ptr %__D.addr.i, align 4175 store float %4, ptr %__E.addr.i, align 4176 store float %5, ptr %__F.addr.i, align 4177 store float %6, ptr %__G.addr.i, align 4178 store float %7, ptr %__H.addr.i, align 4179 store float %8, ptr %__I.addr.i, align 4180 store float %9, ptr %__J.addr.i, align 4181 store float %10, ptr %__K.addr.i, align 4182 store float %11, ptr %__L.addr.i, align 4183 store float %12, ptr %__M.addr.i, align 4184 store float %13, ptr %__N.addr.i, align 4185 store float %14, ptr %__O.addr.i, align 4186 store float %15, ptr %__P.addr.i, align 4187 %16 = load float, ptr %__P.addr.i, align 4188 %vecinit.i = insertelement <16 x float> undef, float %16, i32 0189 %17 = load float, ptr %__O.addr.i, align 4190 %vecinit1.i = insertelement <16 x float> %vecinit.i, float %17, i32 1191 %18 = load float, ptr %__N.addr.i, align 4192 %vecinit2.i = insertelement <16 x float> %vecinit1.i, float %18, i32 2193 %19 = load float, ptr %__M.addr.i, align 4194 %vecinit3.i = insertelement <16 x float> %vecinit2.i, float %19, i32 3195 %20 = load float, ptr %__L.addr.i, align 4196 %vecinit4.i = insertelement <16 x float> %vecinit3.i, float %20, i32 4197 %21 = load float, ptr %__K.addr.i, align 4198 %vecinit5.i = insertelement <16 x float> %vecinit4.i, float %21, i32 5199 %22 = load float, ptr %__J.addr.i, align 4200 %vecinit6.i = insertelement <16 x float> %vecinit5.i, float %22, i32 6201 %23 = load float, ptr %__I.addr.i, align 4202 %vecinit7.i = insertelement <16 x float> %vecinit6.i, float %23, i32 7203 %24 = load float, ptr %__H.addr.i, align 4204 %vecinit8.i = insertelement <16 x float> %vecinit7.i, float %24, i32 8205 %25 = load float, ptr %__G.addr.i, align 4206 %vecinit9.i = insertelement <16 x float> %vecinit8.i, float %25, i32 9207 %26 = load float, ptr %__F.addr.i, align 4208 %vecinit10.i = insertelement <16 x float> %vecinit9.i, float %26, i32 10209 %27 = load float, ptr %__E.addr.i, align 4210 %vecinit11.i = insertelement <16 x float> %vecinit10.i, float %27, i32 11211 %28 = load float, ptr %__D.addr.i, align 4212 %vecinit12.i = insertelement <16 x float> %vecinit11.i, float %28, i32 12213 %29 = load float, ptr %__C.addr.i, align 4214 %vecinit13.i = insertelement <16 x float> %vecinit12.i, float %29, i32 13215 %30 = load float, ptr %__B.addr.i, align 4216 %vecinit14.i = insertelement <16 x float> %vecinit13.i, float %30, i32 14217 %31 = load float, ptr %__A.addr.i, align 4218 %vecinit15.i = insertelement <16 x float> %vecinit14.i, float %31, i32 15219 store <16 x float> %vecinit15.i, ptr %.compoundliteral.i, align 64220 %32 = load <16 x float>, ptr %.compoundliteral.i, align 64221 ret <16 x float> %32222}223