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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s3 4define x86_fp80 @rem_pio2l_min(x86_fp80 %z) {5; CHECK-LABEL: rem_pio2l_min:6; CHECK: # %bb.0: # %entry7; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)8; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)9; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax10; CHECK-NEXT: orl $3072, %eax # imm = 0xC0011; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)12; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)13; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)14; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)15; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax16; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)17; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)18; CHECK-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}(%rip)19; CHECK-NEXT: fmul %st, %st(1)20; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)21; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax22; CHECK-NEXT: orl $3072, %eax # imm = 0xC0023; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)24; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)25; CHECK-NEXT: fxch %st(1)26; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)27; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)28; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax29; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)30; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)31; CHECK-NEXT: fmulp %st, %st(1)32; CHECK-NEXT: retq33entry:34 %conv = fptosi x86_fp80 %z to i3235 %conv1 = sitofp i32 %conv to x86_fp8036 %sub = fsub x86_fp80 %z, %conv137 %mul = fmul x86_fp80 %sub, 0xK4017800000000000000038 %conv2 = fptosi x86_fp80 %mul to i3239 %conv3 = sitofp i32 %conv2 to x86_fp8040 %sub4 = fsub x86_fp80 %mul, %conv341 %mul5 = fmul x86_fp80 %sub4, 0xK4017800000000000000042 ret x86_fp80 %mul543}44