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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefixes=CHECK,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,AVX6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK,AVX8 9declare i64 @llvm.vector.reduce.or.v2i64(<2 x i64>)10 11define i1 @parseHeaders(ptr %ptr) nounwind {12; SSE2-LABEL: parseHeaders:13; SSE2: # %bb.0:14; SSE2-NEXT: movdqu (%rdi), %xmm015; SSE2-NEXT: pxor %xmm1, %xmm116; SSE2-NEXT: pcmpeqd %xmm0, %xmm117; SSE2-NEXT: movmskps %xmm1, %eax18; SSE2-NEXT: xorl $15, %eax19; SSE2-NEXT: sete %al20; SSE2-NEXT: retq21;22; SSE41-LABEL: parseHeaders:23; SSE41: # %bb.0:24; SSE41-NEXT: movdqu (%rdi), %xmm025; SSE41-NEXT: ptest %xmm0, %xmm026; SSE41-NEXT: sete %al27; SSE41-NEXT: retq28;29; AVX-LABEL: parseHeaders:30; AVX: # %bb.0:31; AVX-NEXT: vmovdqu (%rdi), %xmm032; AVX-NEXT: vptest %xmm0, %xmm033; AVX-NEXT: sete %al34; AVX-NEXT: retq35 %vload = load <2 x i64>, ptr %ptr, align 836 %vreduce = call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> %vload)37 %vcheck = icmp eq i64 %vreduce, 038 ret i1 %vcheck39}40 41define i1 @parseHeaders2_scalar_or(ptr %ptr) nounwind {42; SSE2-LABEL: parseHeaders2_scalar_or:43; SSE2: # %bb.0:44; SSE2-NEXT: movdqu (%rdi), %xmm045; SSE2-NEXT: pxor %xmm1, %xmm146; SSE2-NEXT: pcmpeqd %xmm0, %xmm147; SSE2-NEXT: movmskps %xmm1, %eax48; SSE2-NEXT: xorl $15, %eax49; SSE2-NEXT: sete %al50; SSE2-NEXT: retq51;52; SSE41-LABEL: parseHeaders2_scalar_or:53; SSE41: # %bb.0:54; SSE41-NEXT: movdqu (%rdi), %xmm055; SSE41-NEXT: ptest %xmm0, %xmm056; SSE41-NEXT: sete %al57; SSE41-NEXT: retq58;59; AVX-LABEL: parseHeaders2_scalar_or:60; AVX: # %bb.0:61; AVX-NEXT: vmovdqu (%rdi), %xmm062; AVX-NEXT: vptest %xmm0, %xmm063; AVX-NEXT: sete %al64; AVX-NEXT: retq65 %vload = load <2 x i64>, ptr %ptr, align 866 %v1 = extractelement <2 x i64> %vload, i32 067 %v2 = extractelement <2 x i64> %vload, i32 168 %vreduce = or i64 %v1, %v269 %vcheck = icmp eq i64 %vreduce, 070 ret i1 %vcheck71}72 73define i1 @parseHeaders2_scalar_and(ptr %ptr) nounwind {74; CHECK-LABEL: parseHeaders2_scalar_and:75; CHECK: # %bb.0:76; CHECK-NEXT: movq (%rdi), %rax77; CHECK-NEXT: testq %rax, 8(%rdi)78; CHECK-NEXT: sete %al79; CHECK-NEXT: retq80 %vload = load <2 x i64>, ptr %ptr, align 881 %v1 = extractelement <2 x i64> %vload, i32 082 %v2 = extractelement <2 x i64> %vload, i32 183 %vreduce = and i64 %v1, %v284 %vcheck = icmp eq i64 %vreduce, 085 ret i1 %vcheck86}87