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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX4 5define { i64, i64 } @PR46189(double %0, double %1, double %2, double %3, double %4) {6; SSE-LABEL: PR46189:7; SSE: # %bb.0:8; SSE-NEXT: movapd %xmm0, %xmm59; SSE-NEXT: subsd %xmm2, %xmm510; SSE-NEXT: addsd %xmm2, %xmm011; SSE-NEXT: unpcklpd {{.*#+}} xmm5 = xmm5[0],xmm0[0]12; SSE-NEXT: unpcklpd {{.*#+}} xmm3 = xmm3[0,0]13; SSE-NEXT: divpd %xmm3, %xmm514; SSE-NEXT: cvttpd2dq %xmm5, %xmm015; SSE-NEXT: movapd %xmm1, %xmm316; SSE-NEXT: subsd %xmm2, %xmm317; SSE-NEXT: addsd %xmm2, %xmm118; SSE-NEXT: unpcklpd {{.*#+}} xmm3 = xmm3[0],xmm1[0]19; SSE-NEXT: unpcklpd {{.*#+}} xmm4 = xmm4[0,0]20; SSE-NEXT: divpd %xmm4, %xmm321; SSE-NEXT: cvttpd2dq %xmm3, %xmm122; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]23; SSE-NEXT: movq %xmm0, %rax24; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]25; SSE-NEXT: movq %xmm0, %rdx26; SSE-NEXT: retq27;28; AVX-LABEL: PR46189:29; AVX: # %bb.0:30; AVX-NEXT: vsubsd %xmm2, %xmm0, %xmm531; AVX-NEXT: vaddsd %xmm2, %xmm0, %xmm032; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm5[0],xmm0[0]33; AVX-NEXT: vmovddup {{.*#+}} xmm3 = xmm3[0,0]34; AVX-NEXT: vdivpd %xmm3, %xmm0, %xmm035; AVX-NEXT: vcvttpd2dq %xmm0, %xmm036; AVX-NEXT: vsubsd %xmm2, %xmm1, %xmm337; AVX-NEXT: vaddsd %xmm2, %xmm1, %xmm138; AVX-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm3[0],xmm1[0]39; AVX-NEXT: vmovddup {{.*#+}} xmm2 = xmm4[0,0]40; AVX-NEXT: vdivpd %xmm2, %xmm1, %xmm141; AVX-NEXT: vcvttpd2dq %xmm1, %xmm142; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]43; AVX-NEXT: vmovq %xmm0, %rax44; AVX-NEXT: vpextrq $1, %xmm0, %rdx45; AVX-NEXT: retq46 %6 = insertelement <2 x double> undef, double %0, i32 047 %7 = shufflevector <2 x double> %6, <2 x double> undef, <2 x i32> zeroinitializer48 %8 = insertelement <2 x double> undef, double %2, i32 049 %9 = shufflevector <2 x double> %8, <2 x double> undef, <2 x i32> zeroinitializer50 %10 = fsub <2 x double> %7, %951 %11 = fadd <2 x double> %7, %952 %12 = shufflevector <2 x double> %10, <2 x double> %11, <2 x i32> <i32 0, i32 3>53 %13 = insertelement <2 x double> undef, double %3, i32 054 %14 = shufflevector <2 x double> %13, <2 x double> undef, <2 x i32> zeroinitializer55 %15 = fdiv <2 x double> %12, %1456 %16 = fptosi <2 x double> %15 to <2 x i32>57 %17 = insertelement <2 x double> undef, double %1, i32 058 %18 = shufflevector <2 x double> %17, <2 x double> undef, <2 x i32> zeroinitializer59 %19 = fsub <2 x double> %18, %960 %20 = fadd <2 x double> %18, %961 %21 = shufflevector <2 x double> %19, <2 x double> %20, <2 x i32> <i32 0, i32 3>62 %22 = insertelement <2 x double> undef, double %4, i32 063 %23 = shufflevector <2 x double> %22, <2 x double> undef, <2 x i32> zeroinitializer64 %24 = fdiv <2 x double> %21, %2365 %25 = fptosi <2 x double> %24 to <2 x i32>66 %26 = zext <2 x i32> %25 to <2 x i64>67 %27 = shl nuw <2 x i64> %26, <i64 32, i64 32>68 %28 = zext <2 x i32> %16 to <2 x i64>69 %29 = or <2 x i64> %27, %2870 %30 = extractelement <2 x i64> %29, i32 071 %31 = insertvalue { i64, i64 } undef, i64 %30, 072 %32 = extractelement <2 x i64> %29, i32 173 %33 = insertvalue { i64, i64 } %31, i64 %32, 174 ret { i64, i64 } %3375}76 77