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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O3 -x86-asm-syntax=intel -mtriple=x86_64 -mcpu=skylake-avx512 < %s | FileCheck %s3 4declare <7 x i1> @llvm.get.active.lane.mask.v7i1.i64(i64, i64)5declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i64(i64, i64)6declare <32 x i1> @llvm.get.active.lane.mask.v32i1.i64(i64, i64)7declare <64 x i1> @llvm.get.active.lane.mask.v64i1.i64(i64, i64)8declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32, i32)9declare <64 x i1> @llvm.get.active.lane.mask.v64i1.i32(i32, i32)10 11define <7 x i1> @create_mask7(i64 %0) {12; CHECK-LABEL: create_mask7:13; CHECK: # %bb.0:14; CHECK-NEXT: mov rax, rdi15; CHECK-NEXT: vpbroadcastq zmm0, rsi16; CHECK-NEXT: vpcmpnleuq k0, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]17; CHECK-NEXT: kshiftrb k1, k0, 618; CHECK-NEXT: kmovd ecx, k119; CHECK-NEXT: kshiftrb k1, k0, 520; CHECK-NEXT: kmovd edx, k121; CHECK-NEXT: kshiftrb k1, k0, 422; CHECK-NEXT: kmovd esi, k123; CHECK-NEXT: kshiftrb k1, k0, 324; CHECK-NEXT: kmovd edi, k125; CHECK-NEXT: kshiftrb k1, k0, 226; CHECK-NEXT: kmovd r8d, k127; CHECK-NEXT: kshiftrb k1, k0, 128; CHECK-NEXT: kmovd r9d, k129; CHECK-NEXT: kmovd r10d, k030; CHECK-NEXT: and r10b, 131; CHECK-NEXT: and r9b, 132; CHECK-NEXT: add r9b, r9b33; CHECK-NEXT: or r9b, r10b34; CHECK-NEXT: and r8b, 135; CHECK-NEXT: shl r8b, 236; CHECK-NEXT: or r8b, r9b37; CHECK-NEXT: and dil, 138; CHECK-NEXT: shl dil, 339; CHECK-NEXT: or dil, r8b40; CHECK-NEXT: and sil, 141; CHECK-NEXT: shl sil, 442; CHECK-NEXT: or sil, dil43; CHECK-NEXT: and dl, 144; CHECK-NEXT: shl dl, 545; CHECK-NEXT: or dl, sil46; CHECK-NEXT: shl cl, 647; CHECK-NEXT: or cl, dl48; CHECK-NEXT: and cl, 12749; CHECK-NEXT: mov byte ptr [rax], cl50; CHECK-NEXT: vzeroupper51; CHECK-NEXT: ret52 %2 = call <7 x i1> @llvm.get.active.lane.mask.v7i1.i64(i64 0, i64 %0)53 ret <7 x i1> %254}55 56define <16 x i1> @create_mask16(i64 %0) {57; CHECK-LABEL: create_mask16:58; CHECK: # %bb.0:59; CHECK-NEXT: vpbroadcastq zmm0, rdi60; CHECK-NEXT: vpcmpnleuq k0, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]61; CHECK-NEXT: vpcmpnleuq k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]62; CHECK-NEXT: kunpckbw k0, k1, k063; CHECK-NEXT: vpmovm2b xmm0, k064; CHECK-NEXT: vzeroupper65; CHECK-NEXT: ret66 %2 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i64(i64 0, i64 %0)67 ret <16 x i1> %268}69 70define <32 x i1> @create_mask32(i64 %0) {71; CHECK-LABEL: create_mask32:72; CHECK: # %bb.0:73; CHECK-NEXT: vpbroadcastq zmm0, rdi74; CHECK-NEXT: vpcmpnleuq k0, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]75; CHECK-NEXT: vpcmpnleuq k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]76; CHECK-NEXT: vpcmpnleuq k2, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]77; CHECK-NEXT: kunpckbw k0, k1, k078; CHECK-NEXT: vpcmpnleuq k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]79; CHECK-NEXT: kunpckbw k1, k1, k280; CHECK-NEXT: kunpckwd k0, k1, k081; CHECK-NEXT: vpmovm2b ymm0, k082; CHECK-NEXT: ret83 %2 = call <32 x i1> @llvm.get.active.lane.mask.v32i1.i64(i64 0, i64 %0)84 ret <32 x i1> %285}86 87define <64 x i1> @create_mask64(i64 %0) {88; CHECK-LABEL: create_mask64:89; CHECK: # %bb.0:90; CHECK-NEXT: vpbroadcastq zmm0, rdi91; CHECK-NEXT: vpcmpnleuq k0, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]92; CHECK-NEXT: vpcmpnleuq k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]93; CHECK-NEXT: vpcmpnleuq k2, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]94; CHECK-NEXT: kunpckbw k0, k1, k095; CHECK-NEXT: vpcmpnleuq k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]96; CHECK-NEXT: kunpckbw k1, k1, k297; CHECK-NEXT: vpcmpnleuq k2, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]98; CHECK-NEXT: kunpckwd k0, k1, k099; CHECK-NEXT: vpcmpnleuq k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]100; CHECK-NEXT: kunpckbw k1, k1, k2101; CHECK-NEXT: vpcmpnleuq k2, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]102; CHECK-NEXT: vpcmpnleuq k3, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]103; CHECK-NEXT: kunpckbw k2, k3, k2104; CHECK-NEXT: kunpckwd k1, k2, k1105; CHECK-NEXT: kunpckdq k0, k1, k0106; CHECK-NEXT: vpmovm2b zmm0, k0107; CHECK-NEXT: ret108 %2 = call <64 x i1> @llvm.get.active.lane.mask.v64i1.i64(i64 0, i64 %0)109 ret <64 x i1> %2110}111 112define <16 x i1> @create_mask16_i32(i32 %0) {113; CHECK-LABEL: create_mask16_i32:114; CHECK: # %bb.0:115; CHECK-NEXT: vpbroadcastd zmm0, edi116; CHECK-NEXT: vpcmpnleud k0, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]117; CHECK-NEXT: vpmovm2b xmm0, k0118; CHECK-NEXT: vzeroupper119; CHECK-NEXT: ret120 %2 = call <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32 0, i32 %0)121 ret <16 x i1> %2122}123 124define <64 x i1> @create_mask64_i32(i32 %0) {125; CHECK-LABEL: create_mask64_i32:126; CHECK: # %bb.0:127; CHECK-NEXT: vpbroadcastd zmm0, edi128; CHECK-NEXT: vpcmpnleud k0, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]129; CHECK-NEXT: vpcmpnleud k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]130; CHECK-NEXT: vpcmpnleud k2, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]131; CHECK-NEXT: kunpckwd k0, k1, k0132; CHECK-NEXT: vpcmpnleud k1, zmm0, zmmword ptr [rip + {{\.?LCPI[0-9]+_[0-9]+}}]133; CHECK-NEXT: kunpckwd k1, k1, k2134; CHECK-NEXT: kunpckdq k0, k1, k0135; CHECK-NEXT: vpmovm2b zmm0, k0136; CHECK-NEXT: ret137 %2 = call <64 x i1> @llvm.get.active.lane.mask.v64i1.i32(i32 0, i32 %0)138 ret <64 x i1> %2139}140