78 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefixes=AVX13; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefixes=AVX24; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX5125 6; FIXME: Ensure when we merge broadcasts to different widths that they come from the same SDValue.7define i32 @PR48215(i32 %a0, i32 %a1) {8; AVX1-LABEL: PR48215:9; AVX1: ## %bb.0:10; AVX1-NEXT: movl %edi, %eax11; AVX1-NEXT: cltd12; AVX1-NEXT: idivl %esi13; AVX1-NEXT: vmovd %edx, %xmm014; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]15; AVX1-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]16; AVX1-NEXT: vmovd %eax, %xmm217; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]18; AVX1-NEXT: vpcmpgtd %xmm2, %xmm1, %xmm319; AVX1-NEXT: vpmovsxbd {{.*#+}} xmm4 = [0,1,2,3]20; AVX1-NEXT: vpcmpgtd %xmm2, %xmm4, %xmm221; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm222; AVX1-NEXT: vmovmskps %ymm2, %ecx23; AVX1-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm024; AVX1-NEXT: vmovmskps %xmm0, %eax25; AVX1-NEXT: addl %ecx, %eax26; AVX1-NEXT: vzeroupper27; AVX1-NEXT: retq28;29; AVX2-LABEL: PR48215:30; AVX2: ## %bb.0:31; AVX2-NEXT: movl %edi, %eax32; AVX2-NEXT: cltd33; AVX2-NEXT: idivl %esi34; AVX2-NEXT: vmovd %eax, %xmm035; AVX2-NEXT: vpbroadcastd %xmm0, %ymm036; AVX2-NEXT: vmovd %edx, %xmm137; AVX2-NEXT: vpbroadcastd %xmm1, %xmm138; AVX2-NEXT: vpcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm039; AVX2-NEXT: vmovmskps %ymm0, %ecx40; AVX2-NEXT: xorl $255, %ecx41; AVX2-NEXT: vpcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm042; AVX2-NEXT: vmovmskps %xmm0, %eax43; AVX2-NEXT: xorl $15, %eax44; AVX2-NEXT: addl %ecx, %eax45; AVX2-NEXT: vzeroupper46; AVX2-NEXT: retq47;48; AVX512-LABEL: PR48215:49; AVX512: ## %bb.0:50; AVX512-NEXT: movl %edi, %eax51; AVX512-NEXT: cltd52; AVX512-NEXT: idivl %esi53; AVX512-NEXT: vpbroadcastd %eax, %ymm054; AVX512-NEXT: vpbroadcastd %edx, %xmm155; AVX512-NEXT: vpcmpltd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %k056; AVX512-NEXT: vpcmpltd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k157; AVX512-NEXT: kmovw %k0, %eax58; AVX512-NEXT: movzbl %al, %ecx59; AVX512-NEXT: kmovw %k1, %eax60; AVX512-NEXT: addl %ecx, %eax61; AVX512-NEXT: vzeroupper62; AVX512-NEXT: retq63 %d = sdiv i32 %a0, %a164 %r = srem i32 %a0, %a165 %dv0 = insertelement <8 x i32> undef, i32 %d, i32 066 %rv0 = insertelement <4 x i32> undef, i32 %r, i32 067 %dv1 = shufflevector <8 x i32> %dv0, <8 x i32> undef, <8 x i32> zeroinitializer68 %rv1 = shufflevector <4 x i32> %rv0, <4 x i32> undef, <4 x i32> zeroinitializer69 %dc0 = icmp slt <8 x i32> %dv1, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>70 %rc0 = icmp slt <4 x i32> %rv1, <i32 4, i32 5, i32 6, i32 7>71 %db0 = bitcast <8 x i1> %dc0 to i872 %rb0 = bitcast <4 x i1> %rc0 to i473 %db1 = zext i8 %db0 to i3274 %rb1 = zext i4 %rb0 to i3275 %res = add i32 %db1, %rb176 ret i32 %res77}78