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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX4 5define i32 @PR53247(){6; SSE-LABEL: PR53247:7; SSE: # %bb.0: # %entry8; SSE-NEXT: xorl %eax, %eax9; SSE-NEXT: retq10;11; AVX-LABEL: PR53247:12; AVX: # %bb.0: # %entry13; AVX-NEXT: xorl %eax, %eax14; AVX-NEXT: retq15entry:16 %0 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> zeroinitializer, <4 x i32> zeroinitializer)17 %1 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %0, <4 x i32> zeroinitializer)18 %vecext.i = extractelement <4 x i32> %1, i32 019 ret i32 %vecext.i20}21declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>)22