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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE3; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX14; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX25; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX5126 7define i64 @PR62286(i32 %a) {8; SSE-LABEL: PR62286:9; SSE: # %bb.0:10; SSE-NEXT: movd %edi, %xmm011; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,1,0]12; SSE-NEXT: paddd %xmm1, %xmm113; SSE-NEXT: pxor %xmm2, %xmm214; SSE-NEXT: pxor %xmm3, %xmm315; SSE-NEXT: pcmpgtd %xmm1, %xmm316; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]17; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,0]18; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm019; SSE-NEXT: pcmpgtd %xmm0, %xmm220; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]21; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]22; SSE-NEXT: paddq %xmm1, %xmm023; SSE-NEXT: movq %xmm0, %rax24; SSE-NEXT: retq25;26; AVX1-LABEL: PR62286:27; AVX1: # %bb.0:28; AVX1-NEXT: vmovd %edi, %xmm029; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]30; AVX1-NEXT: vxorps %xmm2, %xmm2, %xmm231; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1,2],ymm1[3],ymm2[4,5,6,7]32; AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm033; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm134; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7]35; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm136; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm037; AVX1-NEXT: vpmovsxdq %xmm0, %xmm138; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]39; AVX1-NEXT: vpmovsxdq %xmm0, %xmm040; AVX1-NEXT: vpaddq %xmm0, %xmm1, %xmm041; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]42; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm043; AVX1-NEXT: vmovq %xmm0, %rax44; AVX1-NEXT: vzeroupper45; AVX1-NEXT: retq46;47; AVX2-LABEL: PR62286:48; AVX2: # %bb.0:49; AVX2-NEXT: vmovd %edi, %xmm050; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,0]51; AVX2-NEXT: vpaddd %ymm0, %ymm0, %ymm152; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm053; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3],ymm1[4],ymm0[5,6,7]54; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm155; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm056; AVX2-NEXT: vpmovsxdq %xmm0, %ymm057; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm158; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm059; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]60; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm061; AVX2-NEXT: vmovq %xmm0, %rax62; AVX2-NEXT: vzeroupper63; AVX2-NEXT: retq64;65; AVX512-LABEL: PR62286:66; AVX512: # %bb.0:67; AVX512-NEXT: vmovd %edi, %xmm068; AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,0]69; AVX512-NEXT: vpaddd %ymm0, %ymm0, %ymm170; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm071; AVX512-NEXT: movw $4369, %ax # imm = 0x111172; AVX512-NEXT: kmovd %eax, %k173; AVX512-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1}74; AVX512-NEXT: vpmovsxdq %ymm0, %zmm075; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm176; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm077; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm178; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm079; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]80; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm081; AVX512-NEXT: vmovq %xmm0, %rax82; AVX512-NEXT: vzeroupper83; AVX512-NEXT: retq84 %v2 = insertelement <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, i32 %a, i64 085 %v3 = insertelement <16 x i32> %v2, i32 0, i64 186 %v4 = insertelement <16 x i32> %v3, i32 0, i64 287 %v5 = insertelement <16 x i32> %v4, i32 %a, i64 388 %v6 = insertelement <16 x i32> %v5, i32 0, i64 489 %v7 = shl <16 x i32> %v6, <i32 1, i32 2, i32 3, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>90 %v8 = and <16 x i32> %v6, <i32 1, i32 -384969324, i32 -1073118976, i32 -2147418112, i32 poison, i32 -384969324, i32 -1073118976, i32 -2147418112, i32 456, i32 -384969324, i32 -1073118976, i32 -2147418112, i32 99, i32 -384969324, i32 -1073118976, i32 -2147418112>91 %v9 = shufflevector <16 x i32> %v7, <16 x i32> %v8, <16 x i32> <i32 0, i32 17, i32 18, i32 19, i32 4, i32 21, i32 22, i32 23, i32 8, i32 25, i32 26, i32 27, i32 12, i32 29, i32 30, i32 31>92 %v10 = sext <16 x i32> %v9 to <16 x i64>93 %v12 = call i64 @llvm.vector.reduce.add.v16i64(<16 x i64> %v10)94 ret i64 %v1295}96declare i64 @llvm.vector.reduce.add.v16i64(<16 x i64>)97