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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX24; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX5125 6; Ensure canonicalizeShuffleWithBinOps doesn't merge binops with different types7 8; Don't merge PCMPGT nodes of different types9define <4 x i32> @dont_merge_pcmpgt(<16 x i8> %0, <4 x i32> %1) {10; SSE-LABEL: dont_merge_pcmpgt:11; SSE: # %bb.0:12; SSE-NEXT: pxor %xmm2, %xmm213; SSE-NEXT: pcmpgtb %xmm2, %xmm014; SSE-NEXT: pcmpgtd %xmm2, %xmm115; SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]16; SSE-NEXT: retq17;18; AVX-LABEL: dont_merge_pcmpgt:19; AVX: # %bb.0:20; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm221; AVX-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm022; AVX-NEXT: vpcmpgtd %xmm2, %xmm1, %xmm123; AVX-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]24; AVX-NEXT: retq25 %3 = icmp sgt <16 x i8> %0, zeroinitializer26 %4 = sext <16 x i1> %3 to <16 x i8>27 %5 = bitcast <16 x i8> %4 to <4 x i32>28 %6 = icmp sgt <4 x i32> %1, zeroinitializer29 %7 = sext <4 x i1> %6 to <4 x i32>30 %8 = shufflevector <4 x i32> %5, <4 x i32> %7, <4 x i32> <i32 0, i32 1, i32 2, i32 7>31 ret <4 x i32> %832}33 34; FIXME: OK to merge logic nodes of different types35define <4 x i32> @merge_and(<16 x i8> %0, <4 x i32> %1) {36; SSE-LABEL: merge_and:37; SSE: # %bb.0:38; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm039; SSE-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm140; SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]41; SSE-NEXT: retq42;43; AVX2-LABEL: merge_and:44; AVX2: # %bb.0:45; AVX2-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm046; AVX2-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1]47; AVX2-NEXT: vandps %xmm2, %xmm1, %xmm148; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]49; AVX2-NEXT: retq50;51; AVX512-LABEL: merge_and:52; AVX512: # %bb.0:53; AVX512-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm054; AVX512-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm155; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]56; AVX512-NEXT: retq57 %3 = and <16 x i8> %0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>58 %4 = bitcast <16 x i8> %3 to <4 x i32>59 %5 = and <4 x i32> %1, <i32 1, i32 1, i32 1, i32 1>60 %6 = shufflevector <4 x i32> %4, <4 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 7>61 ret <4 x i32> %662}63