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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s3 4define <4 x i32> @PR63507() {5; CHECK-LABEL: PR63507:6; CHECK: # %bb.0:7; CHECK-NEXT: vpmovsxbd {{.*#+}} xmm0 = [4294967295,0,4294967295,0]8; CHECK-NEXT: vpmulld %xmm0, %xmm0, %xmm09; CHECK-NEXT: retq10 %psll.i = tail call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> zeroinitializer, <4 x i32> zeroinitializer)11 %cmp.i = icmp eq <4 x i32> %psll.i, zeroinitializer12 %sext.i = sext <4 x i1> %cmp.i to <4 x i32>13 %shuffle.i101 = shufflevector <4 x i32> %sext.i, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 1, i32 5>14 %mul.i = mul <4 x i32> %shuffle.i101, %shuffle.i10115 ret <4 x i32> %mul.i16}17declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>)18