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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX23; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX5124 5define void @f(ptr %0) {6; AVX2-LABEL: f:7; AVX2: # %bb.0:8; AVX2-NEXT: movzbl (%rdi), %eax9; AVX2-NEXT: movl %eax, %ecx10; AVX2-NEXT: shrb $2, %cl11; AVX2-NEXT: andb $1, %cl12; AVX2-NEXT: movl %eax, %edx13; AVX2-NEXT: andb $1, %dl14; AVX2-NEXT: vmovd %edx, %xmm015; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm016; AVX2-NEXT: movl %eax, %ecx17; AVX2-NEXT: shrb $3, %cl18; AVX2-NEXT: andb $1, %cl19; AVX2-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm020; AVX2-NEXT: movl %eax, %ecx21; AVX2-NEXT: shrb $4, %cl22; AVX2-NEXT: andb $1, %cl23; AVX2-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm024; AVX2-NEXT: movl %eax, %ecx25; AVX2-NEXT: shrb $5, %cl26; AVX2-NEXT: andb $1, %cl27; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm028; AVX2-NEXT: movl %eax, %ecx29; AVX2-NEXT: shrb $6, %cl30; AVX2-NEXT: andb $1, %cl31; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm032; AVX2-NEXT: shrb $7, %al33; AVX2-NEXT: vpinsrb $14, %eax, %xmm0, %xmm034; AVX2-NEXT: movl $1, %eax35; AVX2-NEXT: vpinsrw $1, %eax, %xmm0, %xmm036; AVX2-NEXT: vpsllw $15, %xmm0, %xmm037; AVX2-NEXT: vpacksswb %xmm0, %xmm0, %xmm038; AVX2-NEXT: vpmovmskb %xmm0, %eax39; AVX2-NEXT: movb %al, (%rdi)40; AVX2-NEXT: retq41;42; AVX512-LABEL: f:43; AVX512: # %bb.0:44; AVX512-NEXT: kmovb (%rdi), %k045; AVX512-NEXT: movb $-3, %al46; AVX512-NEXT: kmovd %eax, %k147; AVX512-NEXT: kandb %k1, %k0, %k048; AVX512-NEXT: movb $1, %al49; AVX512-NEXT: kmovd %eax, %k150; AVX512-NEXT: kshiftlb $7, %k1, %k151; AVX512-NEXT: kshiftrb $6, %k1, %k152; AVX512-NEXT: korb %k1, %k0, %k053; AVX512-NEXT: kmovb %k0, (%rdi)54; AVX512-NEXT: retq55 %2 = load <8 x i1>, ptr %056 %3 = insertelement <8 x i1> %2, i1 true, i32 157 store <8 x i1> %3, ptr %058 ret void59}60