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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=corei7 < %s | FileCheck %s3 4; This test checks various function call behaviors between preserve_none and5; normal calling conventions.6 7declare preserve_nonecc void @callee(ptr)8 9; Normal caller calls preserve_none callee. Will not generated tail call because10; of incompatible calling convention. Callee saved registers are saved/restored11; around the call.12define void @caller1(ptr %a) {13; CHECK-LABEL: caller1:14; CHECK: # %bb.0:15; CHECK-NEXT: pushq %r1516; CHECK-NEXT: .cfi_def_cfa_offset 1617; CHECK-NEXT: pushq %r1418; CHECK-NEXT: .cfi_def_cfa_offset 2419; CHECK-NEXT: pushq %r1320; CHECK-NEXT: .cfi_def_cfa_offset 3221; CHECK-NEXT: pushq %r1222; CHECK-NEXT: .cfi_def_cfa_offset 4023; CHECK-NEXT: pushq %rbx24; CHECK-NEXT: .cfi_def_cfa_offset 4825; CHECK-NEXT: .cfi_offset %rbx, -4826; CHECK-NEXT: .cfi_offset %r12, -4027; CHECK-NEXT: .cfi_offset %r13, -3228; CHECK-NEXT: .cfi_offset %r14, -2429; CHECK-NEXT: .cfi_offset %r15, -1630; CHECK-NEXT: movq %rdi, %r1231; CHECK-NEXT: callq callee@PLT32; CHECK-NEXT: popq %rbx33; CHECK-NEXT: .cfi_def_cfa_offset 4034; CHECK-NEXT: popq %r1235; CHECK-NEXT: .cfi_def_cfa_offset 3236; CHECK-NEXT: popq %r1337; CHECK-NEXT: .cfi_def_cfa_offset 2438; CHECK-NEXT: popq %r1439; CHECK-NEXT: .cfi_def_cfa_offset 1640; CHECK-NEXT: popq %r1541; CHECK-NEXT: .cfi_def_cfa_offset 842; CHECK-NEXT: retq43 tail call preserve_nonecc void @callee(ptr %a)44 ret void45}46 47; Preserve_none caller calls preserve_none callee. Same function body.48; The tail call is preserved. No registers are saved/restored around the call.49; Actually a simple jmp instruction is generated.50define preserve_nonecc void @caller2(ptr %a) {51; CHECK-LABEL: caller2:52; CHECK: # %bb.0:53; CHECK-NEXT: jmp callee@PLT # TAILCALL54 tail call preserve_nonecc void @callee(ptr %a)55 ret void56}57 58; Preserve_none function can use more registers to pass parameters.59declare preserve_nonecc i64 @callee_with_many_param2(i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, i64 %a9, i64 %a10, i64 %a11)60define preserve_nonecc i64 @callee_with_many_param(i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, i64 %a9, i64 %a10, i64 %a11, i64 %a12) {61; CHECK-LABEL: callee_with_many_param:62; CHECK: # %bb.0:63; CHECK-NEXT: pushq %rax64; CHECK-NEXT: .cfi_def_cfa_offset 1665; CHECK-NEXT: movq %r13, %r1266; CHECK-NEXT: movq %r14, %r1367; CHECK-NEXT: movq %r15, %r1468; CHECK-NEXT: movq %rdi, %r1569; CHECK-NEXT: movq %rsi, %rdi70; CHECK-NEXT: movq %rdx, %rsi71; CHECK-NEXT: movq %rcx, %rdx72; CHECK-NEXT: movq %r8, %rcx73; CHECK-NEXT: movq %r9, %r874; CHECK-NEXT: movq %r11, %r975; CHECK-NEXT: movq %rax, %r1176; CHECK-NEXT: callq callee_with_many_param2@PLT77; CHECK-NEXT: popq %rcx78; CHECK-NEXT: .cfi_def_cfa_offset 879; CHECK-NEXT: retq80 %ret = call preserve_nonecc i64 @callee_with_many_param2(i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, i64 %a9, i64 %a10, i64 %a11, i64 %a12)81 ret i64 %ret82}83 84define i64 @caller3() {85; CHECK-LABEL: caller3:86; CHECK: # %bb.0:87; CHECK-NEXT: pushq %r1588; CHECK-NEXT: .cfi_def_cfa_offset 1689; CHECK-NEXT: pushq %r1490; CHECK-NEXT: .cfi_def_cfa_offset 2491; CHECK-NEXT: pushq %r1392; CHECK-NEXT: .cfi_def_cfa_offset 3293; CHECK-NEXT: pushq %r1294; CHECK-NEXT: .cfi_def_cfa_offset 4095; CHECK-NEXT: pushq %rbx96; CHECK-NEXT: .cfi_def_cfa_offset 4897; CHECK-NEXT: .cfi_offset %rbx, -4898; CHECK-NEXT: .cfi_offset %r12, -4099; CHECK-NEXT: .cfi_offset %r13, -32100; CHECK-NEXT: .cfi_offset %r14, -24101; CHECK-NEXT: .cfi_offset %r15, -16102; CHECK-NEXT: movl $1, %r12d103; CHECK-NEXT: movl $2, %r13d104; CHECK-NEXT: movl $3, %r14d105; CHECK-NEXT: movl $4, %r15d106; CHECK-NEXT: movl $5, %edi107; CHECK-NEXT: movl $6, %esi108; CHECK-NEXT: movl $7, %edx109; CHECK-NEXT: movl $8, %ecx110; CHECK-NEXT: movl $9, %r8d111; CHECK-NEXT: movl $10, %r9d112; CHECK-NEXT: movl $11, %r11d113; CHECK-NEXT: movl $12, %eax114; CHECK-NEXT: callq callee_with_many_param@PLT115; CHECK-NEXT: popq %rbx116; CHECK-NEXT: .cfi_def_cfa_offset 40117; CHECK-NEXT: popq %r12118; CHECK-NEXT: .cfi_def_cfa_offset 32119; CHECK-NEXT: popq %r13120; CHECK-NEXT: .cfi_def_cfa_offset 24121; CHECK-NEXT: popq %r14122; CHECK-NEXT: .cfi_def_cfa_offset 16123; CHECK-NEXT: popq %r15124; CHECK-NEXT: .cfi_def_cfa_offset 8125; CHECK-NEXT: retq126 %ret = call preserve_nonecc i64 @callee_with_many_param(i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12)127 ret i64 %ret128}129 130; Non-volatile registers are used to pass the first few parameters.131declare void @boring()132declare preserve_nonecc void @continuation(ptr, ptr, ptr, ptr)133define preserve_nonecc void @entry(ptr %r12, ptr %r13, ptr %r14, ptr %r15) {134; CHECK-LABEL: entry:135; CHECK: # %bb.0:136; CHECK-NEXT: pushq %rax137; CHECK-NEXT: .cfi_def_cfa_offset 16138; CHECK-NEXT: callq boring@PLT139; CHECK-NEXT: popq %rax140; CHECK-NEXT: .cfi_def_cfa_offset 8141; CHECK-NEXT: jmp continuation@PLT # TAILCALL142 call void @boring()143 musttail call preserve_nonecc void @continuation(ptr %r12, ptr %r13, ptr %r14, ptr %r15)144 ret void145}146