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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE23; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE44; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX15; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX26 7define <4 x i64> @PR45808(<4 x i64> %0, <4 x i64> %1) {8; SSE2-LABEL: PR45808:9; SSE2: # %bb.0:10; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648]11; SSE2-NEXT: movdqa %xmm3, %xmm512; SSE2-NEXT: pxor %xmm4, %xmm513; SSE2-NEXT: movdqa %xmm1, %xmm614; SSE2-NEXT: pxor %xmm4, %xmm615; SSE2-NEXT: movdqa %xmm6, %xmm716; SSE2-NEXT: pcmpgtd %xmm5, %xmm717; SSE2-NEXT: movdqa %xmm2, %xmm818; SSE2-NEXT: pxor %xmm4, %xmm819; SSE2-NEXT: pxor %xmm0, %xmm420; SSE2-NEXT: movdqa %xmm4, %xmm921; SSE2-NEXT: pcmpgtd %xmm8, %xmm922; SSE2-NEXT: movdqa %xmm9, %xmm1023; SSE2-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,2],xmm7[0,2]24; SSE2-NEXT: pcmpeqd %xmm5, %xmm625; SSE2-NEXT: pcmpeqd %xmm8, %xmm426; SSE2-NEXT: shufps {{.*#+}} xmm4 = xmm4[1,3],xmm6[1,3]27; SSE2-NEXT: andps %xmm10, %xmm428; SSE2-NEXT: shufps {{.*#+}} xmm9 = xmm9[1,3],xmm7[1,3]29; SSE2-NEXT: orps %xmm4, %xmm930; SSE2-NEXT: pcmpeqd %xmm4, %xmm431; SSE2-NEXT: pxor %xmm9, %xmm432; SSE2-NEXT: pxor %xmm5, %xmm533; SSE2-NEXT: pcmpgtd %xmm4, %xmm534; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]35; SSE2-NEXT: pand %xmm4, %xmm036; SSE2-NEXT: pandn %xmm2, %xmm437; SSE2-NEXT: por %xmm4, %xmm038; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm9[2,2,3,3]39; SSE2-NEXT: pslld $31, %xmm240; SSE2-NEXT: psrad $31, %xmm241; SSE2-NEXT: pand %xmm2, %xmm142; SSE2-NEXT: pandn %xmm3, %xmm243; SSE2-NEXT: por %xmm2, %xmm144; SSE2-NEXT: retq45;46; SSE4-LABEL: PR45808:47; SSE4: # %bb.0:48; SSE4-NEXT: movdqa %xmm0, %xmm449; SSE4-NEXT: movdqa %xmm0, %xmm550; SSE4-NEXT: pcmpgtq %xmm2, %xmm551; SSE4-NEXT: movdqa %xmm1, %xmm052; SSE4-NEXT: pcmpgtq %xmm3, %xmm053; SSE4-NEXT: blendvpd %xmm0, %xmm1, %xmm354; SSE4-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2]55; SSE4-NEXT: blendvpd %xmm0, %xmm2, %xmm456; SSE4-NEXT: movapd %xmm4, %xmm057; SSE4-NEXT: movapd %xmm3, %xmm158; SSE4-NEXT: retq59;60; AVX1-LABEL: PR45808:61; AVX1: # %bb.0:62; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm263; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm364; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm265; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm366; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm267; AVX1-NEXT: vxorpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm268; AVX1-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm069; AVX1-NEXT: retq70;71; AVX2-LABEL: PR45808:72; AVX2: # %bb.0:73; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm274; AVX2-NEXT: vpxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm275; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm076; AVX2-NEXT: retq77 %3 = icmp sgt <4 x i64> %0, %178 %4 = xor <4 x i1> %3, <i1 true, i1 true, i1 false, i1 false>79 %5 = select <4 x i1> %4, <4 x i64> %0, <4 x i64> %180 ret <4 x i64> %581}82