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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X863; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X644 5define i32 @mul_f(ptr %A) {6; X86-LABEL: mul_f:7; X86: # %bb.0: # %entry8; X86-NEXT: movl {{[0-9]+}}(%esp), %eax9; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero10; X86-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero11; X86-NEXT: pmullw %xmm0, %xmm012; X86-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]13; X86-NEXT: movd %xmm0, (%eax)14; X86-NEXT: xorl %eax, %eax15; X86-NEXT: retl16;17; X64-LABEL: mul_f:18; X64: # %bb.0: # %entry19; X64-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero20; X64-NEXT: pmullw %xmm0, %xmm021; X64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,u,u,u,u,u,u,u,u,u,u,u,u]22; X64-NEXT: movd %xmm0, (%rax)23; X64-NEXT: xorl %eax, %eax24; X64-NEXT: retq25entry:26 %0 = load <4 x i8>, ptr %A, align 827 %mul = mul <4 x i8> %0, %028 store <4 x i8> %mul, ptr undef29 ret i32 030}31 32define i32 @shuff_f(ptr %A) {33; X86-LABEL: shuff_f:34; X86: # %bb.0: # %entry35; X86-NEXT: movl {{[0-9]+}}(%esp), %eax36; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero37; X86-NEXT: paddb %xmm0, %xmm038; X86-NEXT: movd %xmm0, (%eax)39; X86-NEXT: xorl %eax, %eax40; X86-NEXT: retl41;42; X64-LABEL: shuff_f:43; X64: # %bb.0: # %entry44; X64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero45; X64-NEXT: paddb %xmm0, %xmm046; X64-NEXT: movd %xmm0, (%rax)47; X64-NEXT: xorl %eax, %eax48; X64-NEXT: retq49entry:50 %0 = load <4 x i8>, ptr %A, align 851 %add = add <4 x i8> %0, %052 store <4 x i8> %add, ptr undef53 ret i32 054}55 56define <2 x float> @bitcast_widen(<4 x i32> %in) nounwind readnone {57; CHECK-LABEL: bitcast_widen:58; CHECK: # %bb.0: # %entry59; CHECK-NEXT: ret{{[l|q]}}60entry:61 %x = shufflevector <4 x i32> %in, <4 x i32> undef, <2 x i32> <i32 0, i32 1>62 %y = bitcast <2 x i32> %x to <2 x float>63 ret <2 x float> %y64}65