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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,-avx | FileCheck %s --check-prefixes=CHECK,SSE23; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx | FileCheck %s --check-prefixes=CHECK,SSE414; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX15; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX5126 7define i32 @veccond128(<4 x i32> %input) {8; SSE2-LABEL: veccond128:9; SSE2: # %bb.0: # %entry10; SSE2-NEXT: pxor %xmm1, %xmm111; SSE2-NEXT: pcmpeqd %xmm0, %xmm112; SSE2-NEXT: movmskps %xmm1, %eax13; SSE2-NEXT: xorl $15, %eax14; SSE2-NEXT: je .LBB0_215; SSE2-NEXT: # %bb.1: # %if-true-block16; SSE2-NEXT: xorl %eax, %eax17; SSE2-NEXT: retq18; SSE2-NEXT: .LBB0_2: # %endif-block19; SSE2-NEXT: movl $1, %eax20; SSE2-NEXT: retq21;22; SSE41-LABEL: veccond128:23; SSE41: # %bb.0: # %entry24; SSE41-NEXT: ptest %xmm0, %xmm025; SSE41-NEXT: je .LBB0_226; SSE41-NEXT: # %bb.1: # %if-true-block27; SSE41-NEXT: xorl %eax, %eax28; SSE41-NEXT: retq29; SSE41-NEXT: .LBB0_2: # %endif-block30; SSE41-NEXT: movl $1, %eax31; SSE41-NEXT: retq32;33; AVX-LABEL: veccond128:34; AVX: # %bb.0: # %entry35; AVX-NEXT: vptest %xmm0, %xmm036; AVX-NEXT: je .LBB0_237; AVX-NEXT: # %bb.1: # %if-true-block38; AVX-NEXT: xorl %eax, %eax39; AVX-NEXT: retq40; AVX-NEXT: .LBB0_2: # %endif-block41; AVX-NEXT: movl $1, %eax42; AVX-NEXT: retq43entry:44 %0 = bitcast <4 x i32> %input to i12845 %1 = icmp ne i128 %0, 046 br i1 %1, label %if-true-block, label %endif-block47if-true-block:48 ret i32 049endif-block:50 ret i32 151}52 53define i32 @veccond256(<8 x i32> %input) {54; SSE2-LABEL: veccond256:55; SSE2: # %bb.0: # %entry56; SSE2-NEXT: por %xmm1, %xmm057; SSE2-NEXT: pxor %xmm1, %xmm158; SSE2-NEXT: pcmpeqd %xmm0, %xmm159; SSE2-NEXT: movmskps %xmm1, %eax60; SSE2-NEXT: xorl $15, %eax61; SSE2-NEXT: je .LBB1_262; SSE2-NEXT: # %bb.1: # %if-true-block63; SSE2-NEXT: xorl %eax, %eax64; SSE2-NEXT: retq65; SSE2-NEXT: .LBB1_2: # %endif-block66; SSE2-NEXT: movl $1, %eax67; SSE2-NEXT: retq68;69; SSE41-LABEL: veccond256:70; SSE41: # %bb.0: # %entry71; SSE41-NEXT: por %xmm1, %xmm072; SSE41-NEXT: ptest %xmm0, %xmm073; SSE41-NEXT: je .LBB1_274; SSE41-NEXT: # %bb.1: # %if-true-block75; SSE41-NEXT: xorl %eax, %eax76; SSE41-NEXT: retq77; SSE41-NEXT: .LBB1_2: # %endif-block78; SSE41-NEXT: movl $1, %eax79; SSE41-NEXT: retq80;81; AVX-LABEL: veccond256:82; AVX: # %bb.0: # %entry83; AVX-NEXT: vptest %ymm0, %ymm084; AVX-NEXT: je .LBB1_285; AVX-NEXT: # %bb.1: # %if-true-block86; AVX-NEXT: xorl %eax, %eax87; AVX-NEXT: vzeroupper88; AVX-NEXT: retq89; AVX-NEXT: .LBB1_2: # %endif-block90; AVX-NEXT: movl $1, %eax91; AVX-NEXT: vzeroupper92; AVX-NEXT: retq93entry:94 %0 = bitcast <8 x i32> %input to i25695 %1 = icmp ne i256 %0, 096 br i1 %1, label %if-true-block, label %endif-block97if-true-block:98 ret i32 099endif-block:100 ret i32 1101}102 103define i32 @veccond512(<16 x i32> %input) {104; SSE2-LABEL: veccond512:105; SSE2: # %bb.0: # %entry106; SSE2-NEXT: por %xmm3, %xmm1107; SSE2-NEXT: por %xmm2, %xmm0108; SSE2-NEXT: por %xmm1, %xmm0109; SSE2-NEXT: pxor %xmm1, %xmm1110; SSE2-NEXT: pcmpeqd %xmm0, %xmm1111; SSE2-NEXT: movmskps %xmm1, %eax112; SSE2-NEXT: xorl $15, %eax113; SSE2-NEXT: je .LBB2_2114; SSE2-NEXT: # %bb.1: # %if-true-block115; SSE2-NEXT: xorl %eax, %eax116; SSE2-NEXT: retq117; SSE2-NEXT: .LBB2_2: # %endif-block118; SSE2-NEXT: movl $1, %eax119; SSE2-NEXT: retq120;121; SSE41-LABEL: veccond512:122; SSE41: # %bb.0: # %entry123; SSE41-NEXT: por %xmm3, %xmm1124; SSE41-NEXT: por %xmm2, %xmm0125; SSE41-NEXT: por %xmm1, %xmm0126; SSE41-NEXT: ptest %xmm0, %xmm0127; SSE41-NEXT: je .LBB2_2128; SSE41-NEXT: # %bb.1: # %if-true-block129; SSE41-NEXT: xorl %eax, %eax130; SSE41-NEXT: retq131; SSE41-NEXT: .LBB2_2: # %endif-block132; SSE41-NEXT: movl $1, %eax133; SSE41-NEXT: retq134;135; AVX1-LABEL: veccond512:136; AVX1: # %bb.0: # %entry137; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0138; AVX1-NEXT: vptest %ymm0, %ymm0139; AVX1-NEXT: je .LBB2_2140; AVX1-NEXT: # %bb.1: # %if-true-block141; AVX1-NEXT: xorl %eax, %eax142; AVX1-NEXT: vzeroupper143; AVX1-NEXT: retq144; AVX1-NEXT: .LBB2_2: # %endif-block145; AVX1-NEXT: movl $1, %eax146; AVX1-NEXT: vzeroupper147; AVX1-NEXT: retq148;149; AVX512-LABEL: veccond512:150; AVX512: # %bb.0: # %entry151; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k0152; AVX512-NEXT: kortestw %k0, %k0153; AVX512-NEXT: je .LBB2_2154; AVX512-NEXT: # %bb.1: # %if-true-block155; AVX512-NEXT: xorl %eax, %eax156; AVX512-NEXT: vzeroupper157; AVX512-NEXT: retq158; AVX512-NEXT: .LBB2_2: # %endif-block159; AVX512-NEXT: movl $1, %eax160; AVX512-NEXT: vzeroupper161; AVX512-NEXT: retq162entry:163 %0 = bitcast <16 x i32> %input to i512164 %1 = icmp ne i512 %0, 0165 br i1 %1, label %if-true-block, label %endif-block166if-true-block:167 ret i32 0168endif-block:169 ret i32 1170}171 172define i32 @vectest128(<4 x i32> %input) {173; SSE2-LABEL: vectest128:174; SSE2: # %bb.0:175; SSE2-NEXT: pxor %xmm1, %xmm1176; SSE2-NEXT: pcmpeqd %xmm0, %xmm1177; SSE2-NEXT: movmskps %xmm1, %ecx178; SSE2-NEXT: xorl %eax, %eax179; SSE2-NEXT: xorl $15, %ecx180; SSE2-NEXT: setne %al181; SSE2-NEXT: retq182;183; SSE41-LABEL: vectest128:184; SSE41: # %bb.0:185; SSE41-NEXT: xorl %eax, %eax186; SSE41-NEXT: ptest %xmm0, %xmm0187; SSE41-NEXT: setne %al188; SSE41-NEXT: retq189;190; AVX-LABEL: vectest128:191; AVX: # %bb.0:192; AVX-NEXT: xorl %eax, %eax193; AVX-NEXT: vptest %xmm0, %xmm0194; AVX-NEXT: setne %al195; AVX-NEXT: retq196 %t0 = bitcast <4 x i32> %input to i128197 %t1 = icmp ne i128 %t0, 0198 %t2 = zext i1 %t1 to i32199 ret i32 %t2200}201 202define i32 @vectest256(<8 x i32> %input) {203; SSE2-LABEL: vectest256:204; SSE2: # %bb.0:205; SSE2-NEXT: por %xmm1, %xmm0206; SSE2-NEXT: pxor %xmm1, %xmm1207; SSE2-NEXT: pcmpeqd %xmm0, %xmm1208; SSE2-NEXT: movmskps %xmm1, %ecx209; SSE2-NEXT: xorl %eax, %eax210; SSE2-NEXT: xorl $15, %ecx211; SSE2-NEXT: setne %al212; SSE2-NEXT: retq213;214; SSE41-LABEL: vectest256:215; SSE41: # %bb.0:216; SSE41-NEXT: por %xmm1, %xmm0217; SSE41-NEXT: xorl %eax, %eax218; SSE41-NEXT: ptest %xmm0, %xmm0219; SSE41-NEXT: setne %al220; SSE41-NEXT: retq221;222; AVX-LABEL: vectest256:223; AVX: # %bb.0:224; AVX-NEXT: xorl %eax, %eax225; AVX-NEXT: vptest %ymm0, %ymm0226; AVX-NEXT: setne %al227; AVX-NEXT: vzeroupper228; AVX-NEXT: retq229 %t0 = bitcast <8 x i32> %input to i256230 %t1 = icmp ne i256 %t0, 0231 %t2 = zext i1 %t1 to i32232 ret i32 %t2233}234 235define i32 @vectest512(<16 x i32> %input) {236; SSE2-LABEL: vectest512:237; SSE2: # %bb.0:238; SSE2-NEXT: por %xmm3, %xmm1239; SSE2-NEXT: por %xmm2, %xmm0240; SSE2-NEXT: por %xmm1, %xmm0241; SSE2-NEXT: pxor %xmm1, %xmm1242; SSE2-NEXT: pcmpeqd %xmm0, %xmm1243; SSE2-NEXT: movmskps %xmm1, %ecx244; SSE2-NEXT: xorl %eax, %eax245; SSE2-NEXT: xorl $15, %ecx246; SSE2-NEXT: setne %al247; SSE2-NEXT: retq248;249; SSE41-LABEL: vectest512:250; SSE41: # %bb.0:251; SSE41-NEXT: por %xmm3, %xmm1252; SSE41-NEXT: por %xmm2, %xmm0253; SSE41-NEXT: por %xmm1, %xmm0254; SSE41-NEXT: xorl %eax, %eax255; SSE41-NEXT: ptest %xmm0, %xmm0256; SSE41-NEXT: setne %al257; SSE41-NEXT: retq258;259; AVX1-LABEL: vectest512:260; AVX1: # %bb.0:261; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0262; AVX1-NEXT: xorl %eax, %eax263; AVX1-NEXT: vptest %ymm0, %ymm0264; AVX1-NEXT: setne %al265; AVX1-NEXT: vzeroupper266; AVX1-NEXT: retq267;268; AVX512-LABEL: vectest512:269; AVX512: # %bb.0:270; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k0271; AVX512-NEXT: xorl %eax, %eax272; AVX512-NEXT: kortestw %k0, %k0273; AVX512-NEXT: setne %al274; AVX512-NEXT: vzeroupper275; AVX512-NEXT: retq276 %t0 = bitcast <16 x i32> %input to i512277 %t1 = icmp ne i512 %t0, 0278 %t2 = zext i1 %t1 to i32279 ret i32 %t2280}281 282define i32 @vecsel128(<4 x i32> %input, i32 %a, i32 %b) {283; SSE2-LABEL: vecsel128:284; SSE2: # %bb.0:285; SSE2-NEXT: movl %edi, %eax286; SSE2-NEXT: pxor %xmm1, %xmm1287; SSE2-NEXT: pcmpeqd %xmm0, %xmm1288; SSE2-NEXT: movmskps %xmm1, %ecx289; SSE2-NEXT: xorl $15, %ecx290; SSE2-NEXT: cmovel %esi, %eax291; SSE2-NEXT: retq292;293; SSE41-LABEL: vecsel128:294; SSE41: # %bb.0:295; SSE41-NEXT: movl %edi, %eax296; SSE41-NEXT: ptest %xmm0, %xmm0297; SSE41-NEXT: cmovel %esi, %eax298; SSE41-NEXT: retq299;300; AVX-LABEL: vecsel128:301; AVX: # %bb.0:302; AVX-NEXT: movl %edi, %eax303; AVX-NEXT: vptest %xmm0, %xmm0304; AVX-NEXT: cmovel %esi, %eax305; AVX-NEXT: retq306 %t0 = bitcast <4 x i32> %input to i128307 %t1 = icmp ne i128 %t0, 0308 %t2 = select i1 %t1, i32 %a, i32 %b309 ret i32 %t2310}311 312define i32 @vecsel256(<8 x i32> %input, i32 %a, i32 %b) {313; SSE2-LABEL: vecsel256:314; SSE2: # %bb.0:315; SSE2-NEXT: movl %edi, %eax316; SSE2-NEXT: por %xmm1, %xmm0317; SSE2-NEXT: pxor %xmm1, %xmm1318; SSE2-NEXT: pcmpeqd %xmm0, %xmm1319; SSE2-NEXT: movmskps %xmm1, %ecx320; SSE2-NEXT: xorl $15, %ecx321; SSE2-NEXT: cmovel %esi, %eax322; SSE2-NEXT: retq323;324; SSE41-LABEL: vecsel256:325; SSE41: # %bb.0:326; SSE41-NEXT: movl %edi, %eax327; SSE41-NEXT: por %xmm1, %xmm0328; SSE41-NEXT: ptest %xmm0, %xmm0329; SSE41-NEXT: cmovel %esi, %eax330; SSE41-NEXT: retq331;332; AVX-LABEL: vecsel256:333; AVX: # %bb.0:334; AVX-NEXT: movl %edi, %eax335; AVX-NEXT: vptest %ymm0, %ymm0336; AVX-NEXT: cmovel %esi, %eax337; AVX-NEXT: vzeroupper338; AVX-NEXT: retq339 %t0 = bitcast <8 x i32> %input to i256340 %t1 = icmp ne i256 %t0, 0341 %t2 = select i1 %t1, i32 %a, i32 %b342 ret i32 %t2343}344 345define i32 @vecsel512(<16 x i32> %input, i32 %a, i32 %b) {346; SSE2-LABEL: vecsel512:347; SSE2: # %bb.0:348; SSE2-NEXT: movl %edi, %eax349; SSE2-NEXT: por %xmm3, %xmm1350; SSE2-NEXT: por %xmm2, %xmm0351; SSE2-NEXT: por %xmm1, %xmm0352; SSE2-NEXT: pxor %xmm1, %xmm1353; SSE2-NEXT: pcmpeqd %xmm0, %xmm1354; SSE2-NEXT: movmskps %xmm1, %ecx355; SSE2-NEXT: xorl $15, %ecx356; SSE2-NEXT: cmovel %esi, %eax357; SSE2-NEXT: retq358;359; SSE41-LABEL: vecsel512:360; SSE41: # %bb.0:361; SSE41-NEXT: movl %edi, %eax362; SSE41-NEXT: por %xmm3, %xmm1363; SSE41-NEXT: por %xmm2, %xmm0364; SSE41-NEXT: por %xmm1, %xmm0365; SSE41-NEXT: ptest %xmm0, %xmm0366; SSE41-NEXT: cmovel %esi, %eax367; SSE41-NEXT: retq368;369; AVX1-LABEL: vecsel512:370; AVX1: # %bb.0:371; AVX1-NEXT: movl %edi, %eax372; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0373; AVX1-NEXT: vptest %ymm0, %ymm0374; AVX1-NEXT: cmovel %esi, %eax375; AVX1-NEXT: vzeroupper376; AVX1-NEXT: retq377;378; AVX512-LABEL: vecsel512:379; AVX512: # %bb.0:380; AVX512-NEXT: movl %edi, %eax381; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k0382; AVX512-NEXT: kortestw %k0, %k0383; AVX512-NEXT: cmovel %esi, %eax384; AVX512-NEXT: vzeroupper385; AVX512-NEXT: retq386 %t0 = bitcast <16 x i32> %input to i512387 %t1 = icmp ne i512 %t0, 0388 %t2 = select i1 %t1, i32 %a, i32 %b389 ret i32 %t2390}391 392define i1 @vecmp_load64x2(ptr %p0) {393; CHECK-LABEL: vecmp_load64x2:394; CHECK: # %bb.0:395; CHECK-NEXT: movq (%rdi), %rax396; CHECK-NEXT: orq 8(%rdi), %rax397; CHECK-NEXT: sete %al398; CHECK-NEXT: retq399 %p1 = getelementptr i8, ptr %p0, i64 8400 %i0 = load i64, ptr %p0, align 1401 %i1 = load i64, ptr %p1, align 1402 %or = or i64 %i0, %i1403 %ne = icmp ne i64 %or, 0404 %zx = zext i1 %ne to i32405 %eq = icmp eq i32 %zx, 0406 ret i1 %eq407}408 409define i1 @vecmp_load64x4(ptr %p0) {410; CHECK-LABEL: vecmp_load64x4:411; CHECK: # %bb.0:412; CHECK-NEXT: movq (%rdi), %rax413; CHECK-NEXT: movq 8(%rdi), %rcx414; CHECK-NEXT: orq 16(%rdi), %rax415; CHECK-NEXT: orq 24(%rdi), %rcx416; CHECK-NEXT: orq %rax, %rcx417; CHECK-NEXT: sete %al418; CHECK-NEXT: retq419 %p1 = getelementptr i8, ptr %p0, i64 8420 %p2 = getelementptr i8, ptr %p0, i64 16421 %p3 = getelementptr i8, ptr %p0, i64 24422 %i0 = load i64, ptr %p0, align 1423 %i1 = load i64, ptr %p1, align 1424 %i2 = load i64, ptr %p2, align 1425 %i3 = load i64, ptr %p3, align 1426 %or02 = or i64 %i0, %i2427 %or13 = or i64 %i1, %i3428 %or = or i64 %or02, %or13429 %ne = icmp ne i64 %or, 0430 %zx = zext i1 %ne to i32431 %eq = icmp eq i32 %zx, 0432 ret i1 %eq433}434 435define i1 @vecmp_load128x2(ptr %p0) {436; CHECK-LABEL: vecmp_load128x2:437; CHECK: # %bb.0:438; CHECK-NEXT: movq (%rdi), %rax439; CHECK-NEXT: movq 8(%rdi), %rcx440; CHECK-NEXT: orq 24(%rdi), %rcx441; CHECK-NEXT: orq 16(%rdi), %rax442; CHECK-NEXT: orq %rcx, %rax443; CHECK-NEXT: sete %al444; CHECK-NEXT: retq445 %p1 = getelementptr i8, ptr %p0, i64 16446 %i0 = load i128, ptr %p0, align 1447 %i1 = load i128, ptr %p1, align 1448 %or = or i128 %i0, %i1449 %ne = icmp ne i128 %or, 0450 %zx = zext i1 %ne to i32451 %eq = icmp eq i32 %zx, 0452 ret i1 %eq453}454 455define i1 @vecmp_load128x4(ptr %p0) {456; CHECK-LABEL: vecmp_load128x4:457; CHECK: # %bb.0:458; CHECK-NEXT: movq (%rdi), %rax459; CHECK-NEXT: movq 8(%rdi), %rcx460; CHECK-NEXT: movq 24(%rdi), %rdx461; CHECK-NEXT: movq 16(%rdi), %rsi462; CHECK-NEXT: orq 32(%rdi), %rax463; CHECK-NEXT: orq 40(%rdi), %rcx464; CHECK-NEXT: orq 48(%rdi), %rsi465; CHECK-NEXT: orq %rax, %rsi466; CHECK-NEXT: orq 56(%rdi), %rdx467; CHECK-NEXT: orq %rcx, %rdx468; CHECK-NEXT: orq %rsi, %rdx469; CHECK-NEXT: sete %al470; CHECK-NEXT: retq471 %p1 = getelementptr i8, ptr %p0, i64 16472 %p2 = getelementptr i8, ptr %p0, i64 32473 %p3 = getelementptr i8, ptr %p0, i64 48474 %i0 = load i128, ptr %p0, align 1475 %i1 = load i128, ptr %p1, align 1476 %i2 = load i128, ptr %p2, align 1477 %i3 = load i128, ptr %p3, align 1478 %or02 = or i128 %i0, %i2479 %or13 = or i128 %i1, %i3480 %or = or i128 %or02, %or13481 %ne = icmp ne i128 %or, 0482 %zx = zext i1 %ne to i32483 %eq = icmp eq i32 %zx, 0484 ret i1 %eq485}486 487; PR144861488define i1 @vecmp_load256x2(ptr %p0) {489; CHECK-LABEL: vecmp_load256x2:490; CHECK: # %bb.0:491; CHECK-NEXT: movq 24(%rdi), %rax492; CHECK-NEXT: movq (%rdi), %rcx493; CHECK-NEXT: movq 8(%rdi), %rdx494; CHECK-NEXT: movq 16(%rdi), %rsi495; CHECK-NEXT: orq 48(%rdi), %rsi496; CHECK-NEXT: orq 32(%rdi), %rcx497; CHECK-NEXT: orq %rsi, %rcx498; CHECK-NEXT: orq 56(%rdi), %rax499; CHECK-NEXT: orq 40(%rdi), %rdx500; CHECK-NEXT: orq %rax, %rdx501; CHECK-NEXT: orq %rcx, %rdx502; CHECK-NEXT: sete %al503; CHECK-NEXT: retq504 %p1 = getelementptr i8, ptr %p0, i64 32505 %i0 = load i256, ptr %p0, align 1506 %i1 = load i256, ptr %p1, align 1507 %or = or i256 %i0, %i1508 %ne = icmp ne i256 %or, 0509 %zx = zext i1 %ne to i32510 %eq = icmp eq i32 %zx, 0511 ret i1 %eq512}513 514define i1 @vecmp_load512x2(ptr %p0) {515; CHECK-LABEL: vecmp_load512x2:516; CHECK: # %bb.0:517; CHECK-NEXT: movq 24(%rdi), %rax518; CHECK-NEXT: movq 56(%rdi), %rdx519; CHECK-NEXT: movq 40(%rdi), %rsi520; CHECK-NEXT: movq 16(%rdi), %rcx521; CHECK-NEXT: movq 48(%rdi), %r8522; CHECK-NEXT: movq (%rdi), %r9523; CHECK-NEXT: movq 8(%rdi), %r10524; CHECK-NEXT: movq 32(%rdi), %r11525; CHECK-NEXT: orq 96(%rdi), %r11526; CHECK-NEXT: orq 64(%rdi), %r9527; CHECK-NEXT: orq %r11, %r9528; CHECK-NEXT: orq 112(%rdi), %r8529; CHECK-NEXT: orq 80(%rdi), %rcx530; CHECK-NEXT: orq %r8, %rcx531; CHECK-NEXT: orq %r9, %rcx532; CHECK-NEXT: orq 104(%rdi), %rsi533; CHECK-NEXT: orq 72(%rdi), %r10534; CHECK-NEXT: orq %rsi, %r10535; CHECK-NEXT: orq 120(%rdi), %rdx536; CHECK-NEXT: orq 88(%rdi), %rax537; CHECK-NEXT: orq %rdx, %rax538; CHECK-NEXT: orq %r10, %rax539; CHECK-NEXT: orq %rcx, %rax540; CHECK-NEXT: sete %al541; CHECK-NEXT: retq542 %p1 = getelementptr i8, ptr %p0, i64 64543 %i0 = load i512, ptr %p0, align 1544 %i1 = load i512, ptr %p1, align 1545 %or = or i512 %i0, %i1546 %ne = icmp ne i512 %or, 0547 %zx = zext i1 %ne to i32548 %eq = icmp eq i32 %zx, 0549 ret i1 %eq550}551