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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --force-update2; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-range -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE3; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-range -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE4 5define <4 x float> @rangeps_128(<4 x float> %a0, <4 x float> %a1) {6; ENABLE-LABEL: rangeps_128:7; ENABLE: # %bb.0:8; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill9; ENABLE-NEXT: #APP10; ENABLE-NEXT: nop11; ENABLE-NEXT: #NO_APP12; ENABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload13; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm114; ENABLE-NEXT: vrangeps $88, %xmm2, %xmm0, %xmm115; ENABLE-NEXT: vaddps %xmm2, %xmm0, %xmm016; ENABLE-NEXT: vaddps %xmm0, %xmm1, %xmm017; ENABLE-NEXT: retq18;19; DISABLE-LABEL: rangeps_128:20; DISABLE: # %bb.0:21; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill22; DISABLE-NEXT: #APP23; DISABLE-NEXT: nop24; DISABLE-NEXT: #NO_APP25; DISABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload26; DISABLE-NEXT: vrangeps $88, %xmm2, %xmm0, %xmm127; DISABLE-NEXT: vaddps %xmm2, %xmm0, %xmm028; DISABLE-NEXT: vaddps %xmm0, %xmm1, %xmm029; DISABLE-NEXT: retq30 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()31 %2 = call <4 x float> @llvm.x86.avx512.mask.range.ps.128(<4 x float> %a0, <4 x float> %a1, i32 88, <4 x float> undef, i8 -1)32 %3 = fadd <4 x float> %a0, %a133 %res = fadd <4 x float> %2, %334 ret <4 x float> %res35}36 37define <4 x float> @rangeps_mem_128(<4 x float> %a0, ptr %p1) {38; ENABLE-LABEL: rangeps_mem_128:39; ENABLE: # %bb.0:40; ENABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill41; ENABLE-NEXT: #APP42; ENABLE-NEXT: nop43; ENABLE-NEXT: #NO_APP44; ENABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload45; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm046; ENABLE-NEXT: vrangeps $88, (%rdi), %xmm1, %xmm047; ENABLE-NEXT: vaddps %xmm1, %xmm0, %xmm048; ENABLE-NEXT: retq49;50; DISABLE-LABEL: rangeps_mem_128:51; DISABLE: # %bb.0:52; DISABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill53; DISABLE-NEXT: #APP54; DISABLE-NEXT: nop55; DISABLE-NEXT: #NO_APP56; DISABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload57; DISABLE-NEXT: vrangeps $88, (%rdi), %xmm1, %xmm058; DISABLE-NEXT: vaddps %xmm1, %xmm0, %xmm059; DISABLE-NEXT: retq60 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()61 %a1 = load <4 x float>, ptr %p1, align 6462 %2 = call <4 x float> @llvm.x86.avx512.mask.range.ps.128(<4 x float> %a0, <4 x float> %a1, i32 88, <4 x float> undef, i8 -1)63 %res = fadd <4 x float> %2, %a064 ret <4 x float> %res65}66 67define <4 x float> @rangeps_broadcast_128(<4 x float> %a0, ptr %p1) {68; ENABLE-LABEL: rangeps_broadcast_128:69; ENABLE: # %bb.0:70; ENABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill71; ENABLE-NEXT: #APP72; ENABLE-NEXT: nop73; ENABLE-NEXT: #NO_APP74; ENABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload75; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm076; ENABLE-NEXT: vrangeps $88, (%rdi){1to4}, %xmm1, %xmm077; ENABLE-NEXT: vaddps %xmm1, %xmm0, %xmm078; ENABLE-NEXT: retq79;80; DISABLE-LABEL: rangeps_broadcast_128:81; DISABLE: # %bb.0:82; DISABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill83; DISABLE-NEXT: #APP84; DISABLE-NEXT: nop85; DISABLE-NEXT: #NO_APP86; DISABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload87; DISABLE-NEXT: vrangeps $88, (%rdi){1to4}, %xmm1, %xmm088; DISABLE-NEXT: vaddps %xmm1, %xmm0, %xmm089; DISABLE-NEXT: retq90 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()91 %v1 = load float, ptr %p1, align 492 %t0 = insertelement <4 x float> undef, float %v1, i64 093 %a1 = shufflevector <4 x float> %t0, <4 x float> undef, <4 x i32> zeroinitializer94 %2 = call <4 x float> @llvm.x86.avx512.mask.range.ps.128(<4 x float> %a0, <4 x float> %a1, i32 88, <4 x float> undef, i8 -1)95 %res = fadd <4 x float> %2, %a096 ret <4 x float> %res97}98 99define <4 x float> @rangeps_maskz_128(<4 x float> %a0, <4 x float> %a1, ptr %pmask) {100; ENABLE-LABEL: rangeps_maskz_128:101; ENABLE: # %bb.0:102; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill103; ENABLE-NEXT: #APP104; ENABLE-NEXT: nop105; ENABLE-NEXT: #NO_APP106; ENABLE-NEXT: kmovb (%rdi), %k1107; ENABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload108; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1109; ENABLE-NEXT: vrangeps $88, %xmm2, %xmm0, %xmm1 {%k1} {z}110; ENABLE-NEXT: vaddps %xmm2, %xmm0, %xmm0111; ENABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0112; ENABLE-NEXT: retq113;114; DISABLE-LABEL: rangeps_maskz_128:115; DISABLE: # %bb.0:116; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill117; DISABLE-NEXT: #APP118; DISABLE-NEXT: nop119; DISABLE-NEXT: #NO_APP120; DISABLE-NEXT: kmovb (%rdi), %k1121; DISABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload122; DISABLE-NEXT: vrangeps $88, %xmm2, %xmm0, %xmm1 {%k1} {z}123; DISABLE-NEXT: vaddps %xmm2, %xmm0, %xmm0124; DISABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0125; DISABLE-NEXT: retq126 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()127 %mask = load i8, ptr %pmask128 %2 = call <4 x float> @llvm.x86.avx512.mask.range.ps.128(<4 x float> %a0, <4 x float> %a1, i32 88, <4 x float> undef, i8 %mask)129 %3 = fadd <4 x float> %a0, %a1130 %res = fadd <4 x float> %2, %3131 ret <4 x float> %res132}133 134declare <4 x float> @llvm.x86.avx512.mask.range.ps.128(<4 x float>, <4 x float>, i32, <4 x float>, i8) nounwind readnone135 136define <8 x float> @rangeps_256(<8 x float> %a0, <8 x float> %a1) {137; ENABLE-LABEL: rangeps_256:138; ENABLE: # %bb.0:139; ENABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill140; ENABLE-NEXT: #APP141; ENABLE-NEXT: nop142; ENABLE-NEXT: #NO_APP143; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload144; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1145; ENABLE-NEXT: vrangeps $88, %ymm2, %ymm0, %ymm1146; ENABLE-NEXT: vaddps %ymm2, %ymm0, %ymm0147; ENABLE-NEXT: vaddps %ymm0, %ymm1, %ymm0148; ENABLE-NEXT: retq149;150; DISABLE-LABEL: rangeps_256:151; DISABLE: # %bb.0:152; DISABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill153; DISABLE-NEXT: #APP154; DISABLE-NEXT: nop155; DISABLE-NEXT: #NO_APP156; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload157; DISABLE-NEXT: vrangeps $88, %ymm2, %ymm0, %ymm1158; DISABLE-NEXT: vaddps %ymm2, %ymm0, %ymm0159; DISABLE-NEXT: vaddps %ymm0, %ymm1, %ymm0160; DISABLE-NEXT: retq161 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()162 %2 = call <8 x float> @llvm.x86.avx512.mask.range.ps.256(<8 x float> %a0, <8 x float> %a1, i32 88, <8 x float> undef, i8 -1)163 %3 = fadd <8 x float> %a0, %a1164 %res = fadd <8 x float> %2, %3165 ret <8 x float> %res166}167 168define <8 x float> @rangeps_mem_256(<8 x float> %a0, ptr %p1) {169; ENABLE-LABEL: rangeps_mem_256:170; ENABLE: # %bb.0:171; ENABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill172; ENABLE-NEXT: #APP173; ENABLE-NEXT: nop174; ENABLE-NEXT: #NO_APP175; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload176; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm0177; ENABLE-NEXT: vrangeps $88, (%rdi), %ymm1, %ymm0178; ENABLE-NEXT: vaddps %ymm1, %ymm0, %ymm0179; ENABLE-NEXT: retq180;181; DISABLE-LABEL: rangeps_mem_256:182; DISABLE: # %bb.0:183; DISABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill184; DISABLE-NEXT: #APP185; DISABLE-NEXT: nop186; DISABLE-NEXT: #NO_APP187; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload188; DISABLE-NEXT: vrangeps $88, (%rdi), %ymm1, %ymm0189; DISABLE-NEXT: vaddps %ymm1, %ymm0, %ymm0190; DISABLE-NEXT: retq191 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()192 %a1 = load <8 x float>, ptr %p1, align 64193 %2 = call <8 x float> @llvm.x86.avx512.mask.range.ps.256(<8 x float> %a0, <8 x float> %a1, i32 88, <8 x float> undef, i8 -1)194 %res = fadd <8 x float> %2, %a0195 ret <8 x float> %res196}197 198define <8 x float> @rangeps_broadcast_256(<8 x float> %a0, ptr %p1) {199; ENABLE-LABEL: rangeps_broadcast_256:200; ENABLE: # %bb.0:201; ENABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill202; ENABLE-NEXT: #APP203; ENABLE-NEXT: nop204; ENABLE-NEXT: #NO_APP205; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload206; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm0207; ENABLE-NEXT: vrangeps $88, (%rdi){1to8}, %ymm1, %ymm0208; ENABLE-NEXT: vaddps %ymm1, %ymm0, %ymm0209; ENABLE-NEXT: retq210;211; DISABLE-LABEL: rangeps_broadcast_256:212; DISABLE: # %bb.0:213; DISABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill214; DISABLE-NEXT: #APP215; DISABLE-NEXT: nop216; DISABLE-NEXT: #NO_APP217; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload218; DISABLE-NEXT: vrangeps $88, (%rdi){1to8}, %ymm1, %ymm0219; DISABLE-NEXT: vaddps %ymm1, %ymm0, %ymm0220; DISABLE-NEXT: retq221 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()222 %v1 = load float, ptr %p1, align 4223 %t0 = insertelement <8 x float> undef, float %v1, i64 0224 %a1 = shufflevector <8 x float> %t0, <8 x float> undef, <8 x i32> zeroinitializer225 %2 = call <8 x float> @llvm.x86.avx512.mask.range.ps.256(<8 x float> %a0, <8 x float> %a1, i32 88, <8 x float> undef, i8 -1)226 %res = fadd <8 x float> %2, %a0227 ret <8 x float> %res228}229 230define <8 x float> @rangeps_maskz_256(<8 x float> %a0, <8 x float> %a1, ptr %pmask) {231; ENABLE-LABEL: rangeps_maskz_256:232; ENABLE: # %bb.0:233; ENABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill234; ENABLE-NEXT: #APP235; ENABLE-NEXT: nop236; ENABLE-NEXT: #NO_APP237; ENABLE-NEXT: kmovb (%rdi), %k1238; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload239; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1240; ENABLE-NEXT: vrangeps $44, %ymm2, %ymm0, %ymm1 {%k1} {z}241; ENABLE-NEXT: vaddps %ymm2, %ymm0, %ymm0242; ENABLE-NEXT: vaddps %ymm0, %ymm1, %ymm0243; ENABLE-NEXT: retq244;245; DISABLE-LABEL: rangeps_maskz_256:246; DISABLE: # %bb.0:247; DISABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill248; DISABLE-NEXT: #APP249; DISABLE-NEXT: nop250; DISABLE-NEXT: #NO_APP251; DISABLE-NEXT: kmovb (%rdi), %k1252; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload253; DISABLE-NEXT: vrangeps $44, %ymm2, %ymm0, %ymm1 {%k1} {z}254; DISABLE-NEXT: vaddps %ymm2, %ymm0, %ymm0255; DISABLE-NEXT: vaddps %ymm0, %ymm1, %ymm0256; DISABLE-NEXT: retq257 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()258 %mask = load i8, ptr %pmask259 %2 = call <8 x float> @llvm.x86.avx512.mask.range.ps.256(<8 x float> %a0, <8 x float> %a1, i32 44, <8 x float> undef, i8 %mask)260 %3 = fadd <8 x float> %a0, %a1261 %res = fadd <8 x float> %2, %3262 ret <8 x float> %res263}264 265declare <8 x float> @llvm.x86.avx512.mask.range.ps.256(<8 x float>, <8 x float>, i32, <8 x float>, i8) nounwind readnone266 267define <16 x float> @rangeps_512(<16 x float> %a0, <16 x float> %a1) {268; ENABLE-LABEL: rangeps_512:269; ENABLE: # %bb.0:270; ENABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill271; ENABLE-NEXT: #APP272; ENABLE-NEXT: nop273; ENABLE-NEXT: #NO_APP274; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload275; ENABLE-NEXT: vpxor %xmm1, %xmm1, %xmm1276; ENABLE-NEXT: vrangeps $88, %zmm2, %zmm0, %zmm1277; ENABLE-NEXT: vaddps %zmm2, %zmm0, %zmm0278; ENABLE-NEXT: vaddps %zmm0, %zmm1, %zmm0279; ENABLE-NEXT: retq280;281; DISABLE-LABEL: rangeps_512:282; DISABLE: # %bb.0:283; DISABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill284; DISABLE-NEXT: #APP285; DISABLE-NEXT: nop286; DISABLE-NEXT: #NO_APP287; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload288; DISABLE-NEXT: vrangeps $88, %zmm2, %zmm0, %zmm1289; DISABLE-NEXT: vaddps %zmm2, %zmm0, %zmm0290; DISABLE-NEXT: vaddps %zmm0, %zmm1, %zmm0291; DISABLE-NEXT: retq292 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()293 %2 = call <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float> %a0, <16 x float> %a1, i32 88, <16 x float> undef, i16 -1, i32 4)294 %3 = fadd <16 x float> %a0, %a1295 %res = fadd <16 x float> %2, %3296 ret <16 x float> %res297}298 299define <16 x float> @rangeps_mem_512(<16 x float> %a0, ptr %p1) {300; ENABLE-LABEL: rangeps_mem_512:301; ENABLE: # %bb.0:302; ENABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill303; ENABLE-NEXT: #APP304; ENABLE-NEXT: nop305; ENABLE-NEXT: #NO_APP306; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload307; ENABLE-NEXT: vpxor %xmm0, %xmm0, %xmm0308; ENABLE-NEXT: vrangeps $88, (%rdi), %zmm1, %zmm0309; ENABLE-NEXT: vaddps %zmm1, %zmm0, %zmm0310; ENABLE-NEXT: retq311;312; DISABLE-LABEL: rangeps_mem_512:313; DISABLE: # %bb.0:314; DISABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill315; DISABLE-NEXT: #APP316; DISABLE-NEXT: nop317; DISABLE-NEXT: #NO_APP318; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload319; DISABLE-NEXT: vrangeps $88, (%rdi), %zmm1, %zmm0320; DISABLE-NEXT: vaddps %zmm1, %zmm0, %zmm0321; DISABLE-NEXT: retq322 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()323 %a1 = load <16 x float>, ptr %p1, align 64324 %2 = call <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float> %a0, <16 x float> %a1, i32 88, <16 x float> undef, i16 -1, i32 4)325 %res = fadd <16 x float> %2, %a0326 ret <16 x float> %res327}328 329define <16 x float> @rangeps_broadcast_512(<16 x float> %a0, ptr %p1) {330; ENABLE-LABEL: rangeps_broadcast_512:331; ENABLE: # %bb.0:332; ENABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill333; ENABLE-NEXT: #APP334; ENABLE-NEXT: nop335; ENABLE-NEXT: #NO_APP336; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload337; ENABLE-NEXT: vpxor %xmm0, %xmm0, %xmm0338; ENABLE-NEXT: vrangeps $88, (%rdi){1to16}, %zmm1, %zmm0339; ENABLE-NEXT: vaddps %zmm1, %zmm0, %zmm0340; ENABLE-NEXT: retq341;342; DISABLE-LABEL: rangeps_broadcast_512:343; DISABLE: # %bb.0:344; DISABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill345; DISABLE-NEXT: #APP346; DISABLE-NEXT: nop347; DISABLE-NEXT: #NO_APP348; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload349; DISABLE-NEXT: vrangeps $88, (%rdi){1to16}, %zmm1, %zmm0350; DISABLE-NEXT: vaddps %zmm1, %zmm0, %zmm0351; DISABLE-NEXT: retq352 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()353 %v1 = load float, ptr %p1, align 4354 %t0 = insertelement <16 x float> undef, float %v1, i64 0355 %a1 = shufflevector <16 x float> %t0, <16 x float> undef, <16 x i32> zeroinitializer356 %2 = call <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float> %a0, <16 x float> %a1, i32 88, <16 x float> undef, i16 -1, i32 4)357 %res = fadd <16 x float> %2, %a0358 ret <16 x float> %res359}360 361define <16 x float> @rangeps_maskz_512(<16 x float> %a0, <16 x float> %a1, ptr %pmask) {362; ENABLE-LABEL: rangeps_maskz_512:363; ENABLE: # %bb.0:364; ENABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill365; ENABLE-NEXT: #APP366; ENABLE-NEXT: nop367; ENABLE-NEXT: #NO_APP368; ENABLE-NEXT: kmovw (%rdi), %k1369; ENABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload370; ENABLE-NEXT: vpxor %xmm1, %xmm1, %xmm1371; ENABLE-NEXT: vrangeps $88, %zmm2, %zmm0, %zmm1 {%k1} {z}372; ENABLE-NEXT: vaddps %zmm2, %zmm0, %zmm0373; ENABLE-NEXT: vaddps %zmm0, %zmm1, %zmm0374; ENABLE-NEXT: retq375;376; DISABLE-LABEL: rangeps_maskz_512:377; DISABLE: # %bb.0:378; DISABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill379; DISABLE-NEXT: #APP380; DISABLE-NEXT: nop381; DISABLE-NEXT: #NO_APP382; DISABLE-NEXT: kmovw (%rdi), %k1383; DISABLE-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload384; DISABLE-NEXT: vrangeps $88, %zmm2, %zmm0, %zmm1 {%k1} {z}385; DISABLE-NEXT: vaddps %zmm2, %zmm0, %zmm0386; DISABLE-NEXT: vaddps %zmm0, %zmm1, %zmm0387; DISABLE-NEXT: retq388 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()389 %mask = load i16, ptr %pmask390 %2 = call <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float> %a0, <16 x float> %a1, i32 88, <16 x float> undef, i16 %mask, i32 4)391 %3 = fadd <16 x float> %a0, %a1392 %res = fadd <16 x float> %2, %3393 ret <16 x float> %res394}395 396declare <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float>, <16 x float>, i32, <16 x float>, i16, i32) nounwind readnone397 398 399define <2 x double> @rangepd_128(<2 x double> %a0, <2 x double> %a1) {400; ENABLE-LABEL: rangepd_128:401; ENABLE: # %bb.0:402; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill403; ENABLE-NEXT: #APP404; ENABLE-NEXT: nop405; ENABLE-NEXT: #NO_APP406; ENABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload407; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1408; ENABLE-NEXT: vrangepd $88, %xmm2, %xmm0, %xmm1409; ENABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0410; ENABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0411; ENABLE-NEXT: retq412;413; DISABLE-LABEL: rangepd_128:414; DISABLE: # %bb.0:415; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill416; DISABLE-NEXT: #APP417; DISABLE-NEXT: nop418; DISABLE-NEXT: #NO_APP419; DISABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload420; DISABLE-NEXT: vrangepd $88, %xmm2, %xmm0, %xmm1421; DISABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0422; DISABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0423; DISABLE-NEXT: retq424 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()425 %2 = call <2 x double> @llvm.x86.avx512.mask.range.pd.128(<2 x double> %a0, <2 x double> %a1, i32 88, <2 x double> undef, i8 -1)426 %3 = fadd <2 x double> %a0, %a1427 %res = fadd <2 x double> %2, %3428 ret <2 x double> %res429}430 431define <2 x double> @rangepd_mem_128(<2 x double> %a0, ptr %p1) {432; ENABLE-LABEL: rangepd_mem_128:433; ENABLE: # %bb.0:434; ENABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill435; ENABLE-NEXT: #APP436; ENABLE-NEXT: nop437; ENABLE-NEXT: #NO_APP438; ENABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload439; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm0440; ENABLE-NEXT: vrangepd $88, (%rdi), %xmm1, %xmm0441; ENABLE-NEXT: vaddpd %xmm1, %xmm0, %xmm0442; ENABLE-NEXT: retq443;444; DISABLE-LABEL: rangepd_mem_128:445; DISABLE: # %bb.0:446; DISABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill447; DISABLE-NEXT: #APP448; DISABLE-NEXT: nop449; DISABLE-NEXT: #NO_APP450; DISABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload451; DISABLE-NEXT: vrangepd $88, (%rdi), %xmm1, %xmm0452; DISABLE-NEXT: vaddpd %xmm1, %xmm0, %xmm0453; DISABLE-NEXT: retq454 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()455 %a1 = load <2 x double>, ptr %p1, align 64456 %2 = call <2 x double> @llvm.x86.avx512.mask.range.pd.128(<2 x double> %a0, <2 x double> %a1, i32 88, <2 x double> undef, i8 -1)457 %res = fadd <2 x double> %2, %a0458 ret <2 x double> %res459}460 461define <2 x double> @rangepd_broadcast_128(<2 x double> %a0, ptr %p1) {462; ENABLE-LABEL: rangepd_broadcast_128:463; ENABLE: # %bb.0:464; ENABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill465; ENABLE-NEXT: #APP466; ENABLE-NEXT: nop467; ENABLE-NEXT: #NO_APP468; ENABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload469; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm0470; ENABLE-NEXT: vrangepd $88, (%rdi){1to2}, %xmm1, %xmm0471; ENABLE-NEXT: vaddpd %xmm1, %xmm0, %xmm0472; ENABLE-NEXT: retq473;474; DISABLE-LABEL: rangepd_broadcast_128:475; DISABLE: # %bb.0:476; DISABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill477; DISABLE-NEXT: #APP478; DISABLE-NEXT: nop479; DISABLE-NEXT: #NO_APP480; DISABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload481; DISABLE-NEXT: vrangepd $88, (%rdi){1to2}, %xmm1, %xmm0482; DISABLE-NEXT: vaddpd %xmm1, %xmm0, %xmm0483; DISABLE-NEXT: retq484 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()485 %v1 = load double, ptr %p1, align 4486 %t0 = insertelement <2 x double> undef, double %v1, i64 0487 %a1 = shufflevector <2 x double> %t0, <2 x double> undef, <2 x i32> zeroinitializer488 %2 = call <2 x double> @llvm.x86.avx512.mask.range.pd.128(<2 x double> %a0, <2 x double> %a1, i32 88, <2 x double> undef, i8 -1)489 %res = fadd <2 x double> %2, %a0490 ret <2 x double> %res491}492 493define <2 x double> @rangepd_maskz_128(<2 x double> %a0, <2 x double> %a1, ptr %pmask) {494; ENABLE-LABEL: rangepd_maskz_128:495; ENABLE: # %bb.0:496; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill497; ENABLE-NEXT: #APP498; ENABLE-NEXT: nop499; ENABLE-NEXT: #NO_APP500; ENABLE-NEXT: kmovb (%rdi), %k1501; ENABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload502; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1503; ENABLE-NEXT: vrangepd $88, %xmm2, %xmm0, %xmm1 {%k1} {z}504; ENABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0505; ENABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0506; ENABLE-NEXT: retq507;508; DISABLE-LABEL: rangepd_maskz_128:509; DISABLE: # %bb.0:510; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill511; DISABLE-NEXT: #APP512; DISABLE-NEXT: nop513; DISABLE-NEXT: #NO_APP514; DISABLE-NEXT: kmovb (%rdi), %k1515; DISABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload516; DISABLE-NEXT: vrangepd $88, %xmm2, %xmm0, %xmm1 {%k1} {z}517; DISABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0518; DISABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0519; DISABLE-NEXT: retq520 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()521 %mask = load i8, ptr %pmask522 %2 = call <2 x double> @llvm.x86.avx512.mask.range.pd.128(<2 x double> %a0, <2 x double> %a1, i32 88, <2 x double> undef, i8 %mask)523 %3 = fadd <2 x double> %a0, %a1524 %res = fadd <2 x double> %2, %3525 ret <2 x double> %res526}527 528declare <2 x double> @llvm.x86.avx512.mask.range.pd.128(<2 x double>, <2 x double>, i32, <2 x double>, i8) nounwind readnone529 530define <4 x double> @rangepd_256(<4 x double> %a0, <4 x double> %a1) {531; ENABLE-LABEL: rangepd_256:532; ENABLE: # %bb.0:533; ENABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill534; ENABLE-NEXT: #APP535; ENABLE-NEXT: nop536; ENABLE-NEXT: #NO_APP537; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload538; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1539; ENABLE-NEXT: vrangepd $88, %ymm2, %ymm0, %ymm1540; ENABLE-NEXT: vaddpd %ymm2, %ymm0, %ymm0541; ENABLE-NEXT: vaddpd %ymm0, %ymm1, %ymm0542; ENABLE-NEXT: retq543;544; DISABLE-LABEL: rangepd_256:545; DISABLE: # %bb.0:546; DISABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill547; DISABLE-NEXT: #APP548; DISABLE-NEXT: nop549; DISABLE-NEXT: #NO_APP550; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload551; DISABLE-NEXT: vrangepd $88, %ymm2, %ymm0, %ymm1552; DISABLE-NEXT: vaddpd %ymm2, %ymm0, %ymm0553; DISABLE-NEXT: vaddpd %ymm0, %ymm1, %ymm0554; DISABLE-NEXT: retq555 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()556 %2 = call <4 x double> @llvm.x86.avx512.mask.range.pd.256(<4 x double> %a0, <4 x double> %a1, i32 88, <4 x double> undef, i8 -1)557 %3 = fadd <4 x double> %a0, %a1558 %res = fadd <4 x double> %2, %3559 ret <4 x double> %res560}561 562define <4 x double> @rangepd_mem_256(<4 x double> %a0, ptr %p1) {563; ENABLE-LABEL: rangepd_mem_256:564; ENABLE: # %bb.0:565; ENABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill566; ENABLE-NEXT: #APP567; ENABLE-NEXT: nop568; ENABLE-NEXT: #NO_APP569; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload570; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm0571; ENABLE-NEXT: vrangepd $88, (%rdi), %ymm1, %ymm0572; ENABLE-NEXT: vaddpd %ymm1, %ymm0, %ymm0573; ENABLE-NEXT: retq574;575; DISABLE-LABEL: rangepd_mem_256:576; DISABLE: # %bb.0:577; DISABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill578; DISABLE-NEXT: #APP579; DISABLE-NEXT: nop580; DISABLE-NEXT: #NO_APP581; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload582; DISABLE-NEXT: vrangepd $88, (%rdi), %ymm1, %ymm0583; DISABLE-NEXT: vaddpd %ymm1, %ymm0, %ymm0584; DISABLE-NEXT: retq585 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()586 %a1 = load <4 x double>, ptr %p1, align 64587 %2 = call <4 x double> @llvm.x86.avx512.mask.range.pd.256(<4 x double> %a0, <4 x double> %a1, i32 88, <4 x double> undef, i8 -1)588 %res = fadd <4 x double> %2, %a0589 ret <4 x double> %res590}591 592define <4 x double> @rangepd_broadcast_256(<4 x double> %a0, ptr %p1) {593; ENABLE-LABEL: rangepd_broadcast_256:594; ENABLE: # %bb.0:595; ENABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill596; ENABLE-NEXT: #APP597; ENABLE-NEXT: nop598; ENABLE-NEXT: #NO_APP599; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload600; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm0601; ENABLE-NEXT: vrangepd $88, (%rdi){1to4}, %ymm1, %ymm0602; ENABLE-NEXT: vaddpd %ymm1, %ymm0, %ymm0603; ENABLE-NEXT: retq604;605; DISABLE-LABEL: rangepd_broadcast_256:606; DISABLE: # %bb.0:607; DISABLE-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill608; DISABLE-NEXT: #APP609; DISABLE-NEXT: nop610; DISABLE-NEXT: #NO_APP611; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm1 # 32-byte Reload612; DISABLE-NEXT: vrangepd $88, (%rdi){1to4}, %ymm1, %ymm0613; DISABLE-NEXT: vaddpd %ymm1, %ymm0, %ymm0614; DISABLE-NEXT: retq615 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()616 %v1 = load double, ptr %p1, align 4617 %t0 = insertelement <4 x double> undef, double %v1, i64 0618 %a1 = shufflevector <4 x double> %t0, <4 x double> undef, <4 x i32> zeroinitializer619 %2 = call <4 x double> @llvm.x86.avx512.mask.range.pd.256(<4 x double> %a0, <4 x double> %a1, i32 88, <4 x double> undef, i8 -1)620 %res = fadd <4 x double> %2, %a0621 ret <4 x double> %res622}623 624define <4 x double> @rangepd_maskz_256(<4 x double> %a0, <4 x double> %a1, ptr %pmask) {625; ENABLE-LABEL: rangepd_maskz_256:626; ENABLE: # %bb.0:627; ENABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill628; ENABLE-NEXT: #APP629; ENABLE-NEXT: nop630; ENABLE-NEXT: #NO_APP631; ENABLE-NEXT: kmovb (%rdi), %k1632; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload633; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1634; ENABLE-NEXT: vrangepd $88, %ymm2, %ymm0, %ymm1 {%k1} {z}635; ENABLE-NEXT: vaddpd %ymm2, %ymm0, %ymm0636; ENABLE-NEXT: vaddpd %ymm0, %ymm1, %ymm0637; ENABLE-NEXT: retq638;639; DISABLE-LABEL: rangepd_maskz_256:640; DISABLE: # %bb.0:641; DISABLE-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill642; DISABLE-NEXT: #APP643; DISABLE-NEXT: nop644; DISABLE-NEXT: #NO_APP645; DISABLE-NEXT: kmovb (%rdi), %k1646; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload647; DISABLE-NEXT: vrangepd $88, %ymm2, %ymm0, %ymm1 {%k1} {z}648; DISABLE-NEXT: vaddpd %ymm2, %ymm0, %ymm0649; DISABLE-NEXT: vaddpd %ymm0, %ymm1, %ymm0650; DISABLE-NEXT: retq651 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()652 %mask = load i8, ptr %pmask653 %2 = call <4 x double> @llvm.x86.avx512.mask.range.pd.256(<4 x double> %a0, <4 x double> %a1, i32 88, <4 x double> undef, i8 %mask)654 %3 = fadd <4 x double> %a0, %a1655 %res = fadd <4 x double> %2, %3656 ret <4 x double> %res657}658 659declare <4 x double> @llvm.x86.avx512.mask.range.pd.256(<4 x double>, <4 x double>, i32, <4 x double>, i8) nounwind readnone660 661define <8 x double> @rangepd_512(<8 x double> %a0, <8 x double> %a1) {662; ENABLE-LABEL: rangepd_512:663; ENABLE: # %bb.0:664; ENABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill665; ENABLE-NEXT: #APP666; ENABLE-NEXT: nop667; ENABLE-NEXT: #NO_APP668; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload669; ENABLE-NEXT: vpxor %xmm1, %xmm1, %xmm1670; ENABLE-NEXT: vrangepd $88, %zmm2, %zmm0, %zmm1671; ENABLE-NEXT: vaddpd %zmm2, %zmm0, %zmm0672; ENABLE-NEXT: vaddpd %zmm0, %zmm1, %zmm0673; ENABLE-NEXT: retq674;675; DISABLE-LABEL: rangepd_512:676; DISABLE: # %bb.0:677; DISABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill678; DISABLE-NEXT: #APP679; DISABLE-NEXT: nop680; DISABLE-NEXT: #NO_APP681; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload682; DISABLE-NEXT: vrangepd $88, %zmm2, %zmm0, %zmm1683; DISABLE-NEXT: vaddpd %zmm2, %zmm0, %zmm0684; DISABLE-NEXT: vaddpd %zmm0, %zmm1, %zmm0685; DISABLE-NEXT: retq686 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()687 %2 = call <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double> %a0, <8 x double> %a1, i32 88, <8 x double> undef, i8 -1, i32 4)688 %3 = fadd <8 x double> %a0, %a1689 %res = fadd <8 x double> %2, %3690 ret <8 x double> %res691}692 693define <8 x double> @rangepd_mem_512(<8 x double> %a0, ptr %p1) {694; ENABLE-LABEL: rangepd_mem_512:695; ENABLE: # %bb.0:696; ENABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill697; ENABLE-NEXT: #APP698; ENABLE-NEXT: nop699; ENABLE-NEXT: #NO_APP700; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload701; ENABLE-NEXT: vpxor %xmm0, %xmm0, %xmm0702; ENABLE-NEXT: vrangepd $88, (%rdi), %zmm1, %zmm0703; ENABLE-NEXT: vaddpd %zmm1, %zmm0, %zmm0704; ENABLE-NEXT: retq705;706; DISABLE-LABEL: rangepd_mem_512:707; DISABLE: # %bb.0:708; DISABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill709; DISABLE-NEXT: #APP710; DISABLE-NEXT: nop711; DISABLE-NEXT: #NO_APP712; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload713; DISABLE-NEXT: vrangepd $88, (%rdi), %zmm1, %zmm0714; DISABLE-NEXT: vaddpd %zmm1, %zmm0, %zmm0715; DISABLE-NEXT: retq716 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()717 %a1 = load <8 x double>, ptr %p1, align 64718 %2 = call <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double> %a0, <8 x double> %a1, i32 88, <8 x double> undef, i8 -1, i32 4)719 %res = fadd <8 x double> %2, %a0720 ret <8 x double> %res721}722 723define <8 x double> @rangepd_broadcast_512(<8 x double> %a0, ptr %p1) {724; ENABLE-LABEL: rangepd_broadcast_512:725; ENABLE: # %bb.0:726; ENABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill727; ENABLE-NEXT: #APP728; ENABLE-NEXT: nop729; ENABLE-NEXT: #NO_APP730; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload731; ENABLE-NEXT: vpxor %xmm0, %xmm0, %xmm0732; ENABLE-NEXT: vrangepd $88, (%rdi){1to8}, %zmm1, %zmm0733; ENABLE-NEXT: vaddpd %zmm1, %zmm0, %zmm0734; ENABLE-NEXT: retq735;736; DISABLE-LABEL: rangepd_broadcast_512:737; DISABLE: # %bb.0:738; DISABLE-NEXT: vmovups %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill739; DISABLE-NEXT: #APP740; DISABLE-NEXT: nop741; DISABLE-NEXT: #NO_APP742; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload743; DISABLE-NEXT: vrangepd $88, (%rdi){1to8}, %zmm1, %zmm0744; DISABLE-NEXT: vaddpd %zmm1, %zmm0, %zmm0745; DISABLE-NEXT: retq746 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()747 %v1 = load double, ptr %p1, align 4748 %t0 = insertelement <8 x double> undef, double %v1, i64 0749 %a1 = shufflevector <8 x double> %t0, <8 x double> undef, <8 x i32> zeroinitializer750 %2 = call <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double> %a0, <8 x double> %a1, i32 88, <8 x double> undef, i8 -1, i32 4)751 %res = fadd <8 x double> %2, %a0752 ret <8 x double> %res753}754 755define <8 x double> @rangepd_maskz_512(<8 x double> %a0, <8 x double> %a1, ptr %pmask) {756; ENABLE-LABEL: rangepd_maskz_512:757; ENABLE: # %bb.0:758; ENABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill759; ENABLE-NEXT: #APP760; ENABLE-NEXT: nop761; ENABLE-NEXT: #NO_APP762; ENABLE-NEXT: kmovb (%rdi), %k1763; ENABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload764; ENABLE-NEXT: vpxor %xmm1, %xmm1, %xmm1765; ENABLE-NEXT: vrangepd $88, %zmm2, %zmm0, %zmm1 {%k1} {z}766; ENABLE-NEXT: vaddpd %zmm2, %zmm0, %zmm0767; ENABLE-NEXT: vaddpd %zmm0, %zmm1, %zmm0768; ENABLE-NEXT: retq769;770; DISABLE-LABEL: rangepd_maskz_512:771; DISABLE: # %bb.0:772; DISABLE-NEXT: vmovups %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill773; DISABLE-NEXT: #APP774; DISABLE-NEXT: nop775; DISABLE-NEXT: #NO_APP776; DISABLE-NEXT: kmovb (%rdi), %k1777; DISABLE-NEXT: vmovupd {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload778; DISABLE-NEXT: vrangepd $88, %zmm2, %zmm0, %zmm1 {%k1} {z}779; DISABLE-NEXT: vaddpd %zmm2, %zmm0, %zmm0780; DISABLE-NEXT: vaddpd %zmm0, %zmm1, %zmm0781; DISABLE-NEXT: retq782 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()783 %mask = load i8, ptr %pmask784 %2 = call <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double> %a0, <8 x double> %a1, i32 88, <8 x double> undef, i8 %mask, i32 4)785 %3 = fadd <8 x double> %a0, %a1786 %res = fadd <8 x double> %2, %3787 ret <8 x double> %res788}789 790declare <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double>, <8 x double>, i32, <8 x double>, i8, i32) nounwind readnone791 792define <4 x float> @rangess(<4 x float> %a0, <4 x float> %a1) {793; ENABLE-LABEL: rangess:794; ENABLE: # %bb.0:795; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill796; ENABLE-NEXT: #APP797; ENABLE-NEXT: nop798; ENABLE-NEXT: #NO_APP799; ENABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload800; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1801; ENABLE-NEXT: vrangess $4, %xmm2, %xmm0, %xmm1802; ENABLE-NEXT: vaddps %xmm0, %xmm2, %xmm0803; ENABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0804; ENABLE-NEXT: retq805;806; DISABLE-LABEL: rangess:807; DISABLE: # %bb.0:808; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill809; DISABLE-NEXT: #APP810; DISABLE-NEXT: nop811; DISABLE-NEXT: #NO_APP812; DISABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload813; DISABLE-NEXT: vrangess $4, %xmm2, %xmm0, %xmm1814; DISABLE-NEXT: vaddps %xmm0, %xmm2, %xmm0815; DISABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0816; DISABLE-NEXT: retq817 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()818 %2 = call <4 x float> @llvm.x86.avx512.mask.range.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> undef, i8 -1, i32 4, i32 4)819 %3 = fadd <4 x float> %a1, %a0820 %res = fadd <4 x float> %2, %3821 ret <4 x float> %res822}823 824define <4 x float> @rangess_mem(<4 x float> %a0, ptr %p1) {825; ENABLE-LABEL: rangess_mem:826; ENABLE: # %bb.0:827; ENABLE-NEXT: #APP828; ENABLE-NEXT: nop829; ENABLE-NEXT: #NO_APP830; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1831; ENABLE-NEXT: vrangess $4, (%rdi), %xmm0, %xmm1832; ENABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0833; ENABLE-NEXT: retq834;835; DISABLE-LABEL: rangess_mem:836; DISABLE: # %bb.0:837; DISABLE-NEXT: #APP838; DISABLE-NEXT: nop839; DISABLE-NEXT: #NO_APP840; DISABLE-NEXT: vrangess $4, (%rdi), %xmm0, %xmm1841; DISABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0842; DISABLE-NEXT: retq843 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()844 %a1 = load <4 x float>, ptr %p1, align 64845 %2 = call <4 x float> @llvm.x86.avx512.mask.range.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> undef, i8 -1, i32 4, i32 4)846 %res = fadd <4 x float> %2, %a0847 ret <4 x float> %res848}849 850define <4 x float> @rangess_maskz(<4 x float> %a0, <4 x float> %a1, ptr %pmask) {851; ENABLE-LABEL: rangess_maskz:852; ENABLE: # %bb.0:853; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill854; ENABLE-NEXT: #APP855; ENABLE-NEXT: nop856; ENABLE-NEXT: #NO_APP857; ENABLE-NEXT: kmovb (%rdi), %k1858; ENABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload859; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1860; ENABLE-NEXT: vrangess $4, %xmm2, %xmm0, %xmm1 {%k1} {z}861; ENABLE-NEXT: vaddps %xmm2, %xmm0, %xmm0862; ENABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0863; ENABLE-NEXT: retq864;865; DISABLE-LABEL: rangess_maskz:866; DISABLE: # %bb.0:867; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill868; DISABLE-NEXT: #APP869; DISABLE-NEXT: nop870; DISABLE-NEXT: #NO_APP871; DISABLE-NEXT: kmovb (%rdi), %k1872; DISABLE-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload873; DISABLE-NEXT: vrangess $4, %xmm2, %xmm0, %xmm1 {%k1} {z}874; DISABLE-NEXT: vaddps %xmm2, %xmm0, %xmm0875; DISABLE-NEXT: vaddps %xmm0, %xmm1, %xmm0876; DISABLE-NEXT: retq877 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()878 %mask = load i8, ptr %pmask879 %2 = call <4 x float> @llvm.x86.avx512.mask.range.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> undef, i8 %mask, i32 4, i32 4)880 %3 = fadd <4 x float> %a0, %a1881 %res = fadd <4 x float> %2, %3882 ret <4 x float> %res883}884 885declare <4 x float> @llvm.x86.avx512.mask.range.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32, i32)886 887define <2 x double> @rangesd(<2 x double> %a0, <2 x double> %a1) {888; ENABLE-LABEL: rangesd:889; ENABLE: # %bb.0:890; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill891; ENABLE-NEXT: #APP892; ENABLE-NEXT: nop893; ENABLE-NEXT: #NO_APP894; ENABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload895; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1896; ENABLE-NEXT: vrangesd $4, %xmm2, %xmm0, %xmm1897; ENABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0898; ENABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0899; ENABLE-NEXT: retq900;901; DISABLE-LABEL: rangesd:902; DISABLE: # %bb.0:903; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill904; DISABLE-NEXT: #APP905; DISABLE-NEXT: nop906; DISABLE-NEXT: #NO_APP907; DISABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload908; DISABLE-NEXT: vrangesd $4, %xmm2, %xmm0, %xmm1909; DISABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0910; DISABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0911; DISABLE-NEXT: retq912 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()913 %2 = call <2 x double> @llvm.x86.avx512.mask.range.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> undef, i8 -1, i32 4, i32 4)914 %3 = fadd <2 x double> %a0, %a1915 %res = fadd <2 x double> %2, %3916 ret <2 x double> %res917}918 919define <2 x double> @rangesd_mem(<2 x double> %a0, ptr %p1) {920; ENABLE-LABEL: rangesd_mem:921; ENABLE: # %bb.0:922; ENABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill923; ENABLE-NEXT: #APP924; ENABLE-NEXT: nop925; ENABLE-NEXT: #NO_APP926; ENABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload927; ENABLE-NEXT: vxorps %xmm0, %xmm0, %xmm0928; ENABLE-NEXT: vrangesd $4, (%rdi), %xmm1, %xmm0929; ENABLE-NEXT: vaddpd %xmm1, %xmm0, %xmm0930; ENABLE-NEXT: retq931;932; DISABLE-LABEL: rangesd_mem:933; DISABLE: # %bb.0:934; DISABLE-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill935; DISABLE-NEXT: #APP936; DISABLE-NEXT: nop937; DISABLE-NEXT: #NO_APP938; DISABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload939; DISABLE-NEXT: vrangesd $4, (%rdi), %xmm1, %xmm0940; DISABLE-NEXT: vaddpd %xmm1, %xmm0, %xmm0941; DISABLE-NEXT: retq942 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()943 %a1 = load <2 x double>, ptr %p1, align 64944 %2 = call <2 x double> @llvm.x86.avx512.mask.range.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> undef, i8 -1, i32 4, i32 4)945 %res = fadd <2 x double> %2, %a0946 ret <2 x double> %res947}948 949define <2 x double> @rangesd_maskz(<2 x double> %a0, <2 x double> %a1, ptr %pmask) {950; ENABLE-LABEL: rangesd_maskz:951; ENABLE: # %bb.0:952; ENABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill953; ENABLE-NEXT: #APP954; ENABLE-NEXT: nop955; ENABLE-NEXT: #NO_APP956; ENABLE-NEXT: kmovb (%rdi), %k1957; ENABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload958; ENABLE-NEXT: vxorps %xmm1, %xmm1, %xmm1959; ENABLE-NEXT: vrangesd $4, %xmm2, %xmm0, %xmm1 {%k1} {z}960; ENABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0961; ENABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0962; ENABLE-NEXT: retq963;964; DISABLE-LABEL: rangesd_maskz:965; DISABLE: # %bb.0:966; DISABLE-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill967; DISABLE-NEXT: #APP968; DISABLE-NEXT: nop969; DISABLE-NEXT: #NO_APP970; DISABLE-NEXT: kmovb (%rdi), %k1971; DISABLE-NEXT: vmovapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload972; DISABLE-NEXT: vrangesd $4, %xmm2, %xmm0, %xmm1 {%k1} {z}973; DISABLE-NEXT: vaddpd %xmm2, %xmm0, %xmm0974; DISABLE-NEXT: vaddpd %xmm0, %xmm1, %xmm0975; DISABLE-NEXT: retq976 %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()977 %mask = load i8, ptr %pmask978 %2 = call <2 x double> @llvm.x86.avx512.mask.range.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> undef, i8 %mask, i32 4, i32 4)979 %3 = fadd <2 x double> %a0, %a1980 %res = fadd <2 x double> %2, %3981 ret <2 x double> %res982}983 984declare <2 x double> @llvm.x86.avx512.mask.range.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32, i32)985