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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefix=SSE23; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=AVX24 5define void @trunc_shl_7_v4i32_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in) {6; SSE2-LABEL: trunc_shl_7_v4i32_v4i64:7; SSE2: # %bb.0:8; SSE2-NEXT: movaps (%rsi), %xmm09; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],mem[0,2]10; SSE2-NEXT: pslld $7, %xmm011; SSE2-NEXT: movdqa %xmm0, (%rdi)12; SSE2-NEXT: retq13;14; AVX2-LABEL: trunc_shl_7_v4i32_v4i64:15; AVX2: # %bb.0:16; AVX2-NEXT: vmovaps (%rsi), %xmm017; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],mem[0,2]18; AVX2-NEXT: vpslld $7, %xmm0, %xmm019; AVX2-NEXT: vmovdqa %xmm0, (%rdi)20; AVX2-NEXT: retq21 %val = load <4 x i64>, ptr addrspace(1) %in22 %shl = shl <4 x i64> %val, <i64 7, i64 7, i64 7, i64 7>23 %trunc = trunc <4 x i64> %shl to <4 x i32>24 store <4 x i32> %trunc, ptr addrspace(1) %out25 ret void26}27 28define <8 x i16> @trunc_shl_15_v8i16_v8i32(<8 x i32> %a) {29; SSE2-LABEL: trunc_shl_15_v8i16_v8i32:30; SSE2: # %bb.0:31; SSE2-NEXT: pslld $16, %xmm132; SSE2-NEXT: psrad $16, %xmm133; SSE2-NEXT: pslld $16, %xmm034; SSE2-NEXT: psrad $16, %xmm035; SSE2-NEXT: packssdw %xmm1, %xmm036; SSE2-NEXT: psllw $15, %xmm037; SSE2-NEXT: retq38;39; AVX2-LABEL: trunc_shl_15_v8i16_v8i32:40; AVX2: # %bb.0:41; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]42; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]43; AVX2-NEXT: vpsllw $15, %xmm0, %xmm044; AVX2-NEXT: vzeroupper45; AVX2-NEXT: retq46 %shl = shl <8 x i32> %a, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>47 %conv = trunc <8 x i32> %shl to <8 x i16>48 ret <8 x i16> %conv49}50 51define <8 x i16> @trunc_shl_16_v8i16_v8i32(<8 x i32> %a) {52; SSE2-LABEL: trunc_shl_16_v8i16_v8i32:53; SSE2: # %bb.0:54; SSE2-NEXT: xorps %xmm0, %xmm055; SSE2-NEXT: retq56;57; AVX2-LABEL: trunc_shl_16_v8i16_v8i32:58; AVX2: # %bb.0:59; AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm060; AVX2-NEXT: retq61 %shl = shl <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>62 %conv = trunc <8 x i32> %shl to <8 x i16>63 ret <8 x i16> %conv64}65 66define <8 x i16> @trunc_shl_17_v8i16_v8i32(<8 x i32> %a) {67; SSE2-LABEL: trunc_shl_17_v8i16_v8i32:68; SSE2: # %bb.0:69; SSE2-NEXT: xorps %xmm0, %xmm070; SSE2-NEXT: retq71;72; AVX2-LABEL: trunc_shl_17_v8i16_v8i32:73; AVX2: # %bb.0:74; AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm075; AVX2-NEXT: retq76 %shl = shl <8 x i32> %a, <i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17>77 %conv = trunc <8 x i32> %shl to <8 x i16>78 ret <8 x i16> %conv79}80 81define void @trunc_shl_31_i32_i64(ptr %out, ptr %in) {82; SSE2-LABEL: trunc_shl_31_i32_i64:83; SSE2: # %bb.0:84; SSE2-NEXT: movl (%rsi), %eax85; SSE2-NEXT: shll $31, %eax86; SSE2-NEXT: movl %eax, (%rdi)87; SSE2-NEXT: retq88;89; AVX2-LABEL: trunc_shl_31_i32_i64:90; AVX2: # %bb.0:91; AVX2-NEXT: movl (%rsi), %eax92; AVX2-NEXT: shll $31, %eax93; AVX2-NEXT: movl %eax, (%rdi)94; AVX2-NEXT: retq95 %val = load i64, ptr %in96 %shl = shl i64 %val, 3197 %trunc = trunc i64 %shl to i3298 store i32 %trunc, ptr %out99 ret void100}101 102define void @trunc_shl_32_i32_i64(ptr %out, ptr %in) {103; SSE2-LABEL: trunc_shl_32_i32_i64:104; SSE2: # %bb.0:105; SSE2-NEXT: movl $0, (%rdi)106; SSE2-NEXT: retq107;108; AVX2-LABEL: trunc_shl_32_i32_i64:109; AVX2: # %bb.0:110; AVX2-NEXT: movl $0, (%rdi)111; AVX2-NEXT: retq112 %val = load i64, ptr %in113 %shl = shl i64 %val, 32114 %trunc = trunc i64 %shl to i32115 store i32 %trunc, ptr %out116 ret void117}118 119define void @trunc_shl_15_i16_i64(ptr %out, ptr %in) {120; SSE2-LABEL: trunc_shl_15_i16_i64:121; SSE2: # %bb.0:122; SSE2-NEXT: movl (%rsi), %eax123; SSE2-NEXT: shll $15, %eax124; SSE2-NEXT: movw %ax, (%rdi)125; SSE2-NEXT: retq126;127; AVX2-LABEL: trunc_shl_15_i16_i64:128; AVX2: # %bb.0:129; AVX2-NEXT: movl (%rsi), %eax130; AVX2-NEXT: shll $15, %eax131; AVX2-NEXT: movw %ax, (%rdi)132; AVX2-NEXT: retq133 %val = load i64, ptr %in134 %shl = shl i64 %val, 15135 %trunc = trunc i64 %shl to i16136 store i16 %trunc, ptr %out137 ret void138}139 140define void @trunc_shl_16_i16_i64(ptr %out, ptr %in) {141; SSE2-LABEL: trunc_shl_16_i16_i64:142; SSE2: # %bb.0:143; SSE2-NEXT: movw $0, (%rdi)144; SSE2-NEXT: retq145;146; AVX2-LABEL: trunc_shl_16_i16_i64:147; AVX2: # %bb.0:148; AVX2-NEXT: movw $0, (%rdi)149; AVX2-NEXT: retq150 %val = load i64, ptr %in151 %shl = shl i64 %val, 16152 %trunc = trunc i64 %shl to i16153 store i16 %trunc, ptr %out154 ret void155}156 157define void @trunc_shl_7_i8_i64(ptr %out, ptr %in) {158; SSE2-LABEL: trunc_shl_7_i8_i64:159; SSE2: # %bb.0:160; SSE2-NEXT: movzbl (%rsi), %eax161; SSE2-NEXT: shlb $7, %al162; SSE2-NEXT: movb %al, (%rdi)163; SSE2-NEXT: retq164;165; AVX2-LABEL: trunc_shl_7_i8_i64:166; AVX2: # %bb.0:167; AVX2-NEXT: movzbl (%rsi), %eax168; AVX2-NEXT: shlb $7, %al169; AVX2-NEXT: movb %al, (%rdi)170; AVX2-NEXT: retq171 %val = load i64, ptr %in172 %shl = shl i64 %val, 7173 %trunc = trunc i64 %shl to i8174 store i8 %trunc, ptr %out175 ret void176}177 178define void @trunc_shl_8_i8_i64(ptr %out, ptr %in) {179; SSE2-LABEL: trunc_shl_8_i8_i64:180; SSE2: # %bb.0:181; SSE2-NEXT: movb $0, (%rdi)182; SSE2-NEXT: retq183;184; AVX2-LABEL: trunc_shl_8_i8_i64:185; AVX2: # %bb.0:186; AVX2-NEXT: movb $0, (%rdi)187; AVX2-NEXT: retq188 %val = load i64, ptr %in189 %shl = shl i64 %val, 8190 %trunc = trunc i64 %shl to i8191 store i8 %trunc, ptr %out192 ret void193}194