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1# RUN: llc -mtriple=i386-unknown-unknown -mcpu=i486 %s -o - -run-pass greedy \2# RUN: -debug-only=regalloc 2>&1 | FileCheck %s3# REQUIRES: asserts4 5--- |6 define void @fun() { ret void }7 8 declare noalias nonnull ptr @_Znwj()9 declare void @_ZNSt3__127__tree_balance_after_insertIPNS_16__tree_node_baseIPvEEEEvT_S5_()10 declare zeroext i1 @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private14_end__commentsEv()11 declare zeroext i1 @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private15_preEnd__authorEv()12...13---14# A physreg should always only be hinted once per getRegAllocationHints() query.15# CHECK: hints: $ebx $edi16# CHECK-NOT: hints: $ebx $edi $ebx $edi17name: fun18alignment: 1619tracksRegLiveness: true20registers: 21 - { id: 0, class: gr32 }22 - { id: 1, class: gr32 }23 - { id: 2, class: gr32 }24 - { id: 3, class: gr32 }25 - { id: 4, class: gr32 }26 - { id: 5, class: gr32 }27 - { id: 6, class: gr32 }28 - { id: 7, class: gr32 }29 - { id: 8, class: gr32 }30 - { id: 9, class: gr32 }31 - { id: 10, class: gr32 }32 - { id: 11, class: gr32 }33 - { id: 12, class: gr32 }34 - { id: 13, class: gr32_abcd }35 - { id: 14, class: gr8 }36 - { id: 15, class: gr32_abcd }37 - { id: 16, class: gr8 }38 - { id: 17, class: gr32 }39 - { id: 18, class: gr32_abcd }40 - { id: 19, class: gr8 }41 - { id: 20, class: gr32_abcd }42 - { id: 21, class: gr8 }43 - { id: 22, class: gr32_abcd }44 - { id: 23, class: gr8 }45 - { id: 24, class: gr32_abcd }46 - { id: 25, class: gr8 }47 - { id: 26, class: gr32_abcd }48 - { id: 27, class: gr8 }49 - { id: 28, class: gr32_abcd }50 - { id: 29, class: gr8 }51 - { id: 30, class: gr32_abcd }52 - { id: 31, class: gr8 }53 - { id: 32, class: gr32_abcd }54 - { id: 33, class: gr8 }55 - { id: 34, class: gr32 }56 - { id: 35, class: gr32_abcd }57 - { id: 36, class: gr8 }58 - { id: 37, class: gr32 }59 - { id: 38, class: gr32 }60 - { id: 39, class: gr32_abcd }61 - { id: 40, class: gr8 }62 - { id: 41, class: gr32_abcd }63 - { id: 42, class: gr8 }64 - { id: 43, class: gr32_abcd }65 - { id: 44, class: gr8 }66 - { id: 45, class: gr32_abcd }67 - { id: 46, class: gr8 }68 - { id: 47, class: gr32_abcd }69 - { id: 48, class: gr8 }70 - { id: 49, class: gr8 }71 - { id: 50, class: gr32_abcd }72 - { id: 51, class: gr8 }73 - { id: 52, class: gr32 }74 - { id: 53, class: gr32 }75 - { id: 54, class: gr32 }76 - { id: 55, class: gr32 }77 - { id: 56, class: gr32_abcd }78 - { id: 57, class: gr8 }79 - { id: 58, class: gr32_abcd }80 - { id: 59, class: gr8 }81 - { id: 60, class: gr32_abcd }82 - { id: 61, class: gr8 }83 - { id: 62, class: gr32_abcd }84 - { id: 63, class: gr8 }85 - { id: 64, class: gr32_abcd }86 - { id: 65, class: gr8 }87 - { id: 66, class: gr32_abcd }88 - { id: 67, class: gr8 }89 - { id: 68, class: gr32_abcd }90 - { id: 69, class: gr8 }91 - { id: 70, class: gr32_abcd }92 - { id: 71, class: gr8 }93 - { id: 72, class: gr32_abcd }94 - { id: 73, class: gr8 }95 - { id: 74, class: gr32 }96 - { id: 75, class: gr32 }97 - { id: 76, class: gr32_abcd }98 - { id: 77, class: gr8 }99 - { id: 78, class: gr32_abcd }100 - { id: 79, class: gr32 }101 - { id: 80, class: gr32 }102 - { id: 81, class: gr32_abcd }103 - { id: 82, class: gr32 }104frameInfo: 105 maxAlignment: 4106 adjustsStack: true107 hasCalls: true108fixedStack: 109 - { id: 0, size: 4, alignment: 4, stack-id: default, isImmutable: true }110body: |111 bb.0:112 successors: %bb.1(0x00000001), %bb.2(0x7fffffff)113 114 %13:gr32_abcd = MOV32r0 implicit-def dead $eflags115 TEST8rr %13.sub_8bit, %13.sub_8bit, implicit-def $eflags116 JCC_1 %bb.2, 5, implicit killed $eflags117 JMP_1 %bb.1118 119 bb.1:120 successors: 121 122 123 bb.2:124 successors: %bb.4(0x7fffffff), %bb.3(0x00000001)125 126 %15:gr32_abcd = MOV32r0 implicit-def dead $eflags127 TEST8rr %15.sub_8bit, %15.sub_8bit, implicit-def $eflags128 JCC_1 %bb.4, 5, implicit killed $eflags129 JMP_1 %bb.3130 131 bb.3:132 successors: 133 134 135 bb.4:136 successors: %bb.6(0x7fffffff), %bb.5(0x00000001)137 138 %12:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg139 %1:gr32 = LEA32r %12, 1, $noreg, 144, $noreg140 MOV32mr undef %17:gr32, 1, $noreg, 0, $noreg, %1141 %18:gr32_abcd = MOV32r0 implicit-def dead $eflags142 TEST8rr %18.sub_8bit, %18.sub_8bit, implicit-def $eflags143 JCC_1 %bb.6, 5, implicit killed $eflags144 JMP_1 %bb.5145 146 bb.5:147 successors: 148 149 150 bb.6:151 successors: %bb.7(0x00000001), %bb.8(0x7fffffff)152 153 %20:gr32_abcd = MOV32r0 implicit-def dead $eflags154 TEST8rr %20.sub_8bit, %20.sub_8bit, implicit-def $eflags155 JCC_1 %bb.8, 5, implicit killed $eflags156 JMP_1 %bb.7157 158 bb.7:159 successors: 160 161 162 bb.8:163 successors: %bb.10(0x7fffffff), %bb.9(0x00000001)164 165 %22:gr32_abcd = MOV32r0 implicit-def dead $eflags166 TEST8rr %22.sub_8bit, %22.sub_8bit, implicit-def $eflags167 JCC_1 %bb.10, 5, implicit killed $eflags168 JMP_1 %bb.9169 170 bb.9:171 successors: 172 173 174 bb.10:175 successors: %bb.12(0x7fffffff), %bb.11(0x00000001)176 177 %24:gr32_abcd = MOV32r0 implicit-def dead $eflags178 TEST8rr %24.sub_8bit, %24.sub_8bit, implicit-def $eflags179 JCC_1 %bb.12, 5, implicit killed $eflags180 JMP_1 %bb.11181 182 bb.11:183 successors: 184 185 186 bb.12:187 successors: %bb.13(0x00000001), %bb.14(0x7fffffff)188 189 %26:gr32_abcd = MOV32r0 implicit-def dead $eflags190 TEST8rr %26.sub_8bit, %26.sub_8bit, implicit-def $eflags191 JCC_1 %bb.14, 5, implicit killed $eflags192 JMP_1 %bb.13193 194 bb.13:195 successors: 196 197 198 bb.14:199 %0:gr32 = LEA32r %12, 1, $noreg, 80, $noreg200 %28:gr32_abcd = MOV32r0 implicit-def dead $eflags201 TEST8rr %28.sub_8bit, %28.sub_8bit, implicit-def $eflags202 JCC_1 %bb.20, 5, implicit killed $eflags203 JMP_1 %bb.15204 205 bb.15:206 successors: %bb.16(0x00000001), %bb.17(0x7fffffff)207 208 %78:gr32_abcd = MOV32r0 implicit-def dead $eflags209 TEST8rr %78.sub_8bit, %78.sub_8bit, implicit-def $eflags210 JCC_1 %bb.17, 5, implicit killed $eflags211 JMP_1 %bb.16212 213 bb.16:214 successors: 215 216 217 bb.17:218 successors: %bb.18(0x7fffffff), %bb.19(0x00000001)219 220 TEST8rr %78.sub_8bit, %78.sub_8bit, implicit-def $eflags221 JCC_1 %bb.19, 4, implicit killed $eflags222 223 bb.18:224 %79:gr32 = LEA32r %12, 1, $noreg, 80, $noreg225 JMP_1 %bb.21226 227 bb.19:228 successors: 229 230 231 bb.20:232 %78:gr32_abcd = COPY %0233 %79:gr32 = COPY %0234 235 bb.21:236 successors: %bb.22, %bb.23237 238 %35:gr32_abcd = MOV32r0 implicit-def dead $eflags239 TEST8rr %35.sub_8bit, %35.sub_8bit, implicit-def $eflags240 %80:gr32 = IMPLICIT_DEF241 JCC_1 %bb.23, 5, implicit killed $eflags242 JMP_1 %bb.22243 244 bb.22:245 ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp246 CALLpcrel32 @_Znwj, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp, implicit-def $eax247 ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp248 %80:gr32 = COPY killed $eax249 MOV32mr undef %38:gr32, 1, $noreg, 0, $noreg, %78250 MOV32mr %79, 1, $noreg, 0, $noreg, %80251 ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp252 CALLpcrel32 @_ZNSt3__127__tree_balance_after_insertIPNS_16__tree_node_baseIPvEEEEvT_S5_, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp253 ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp254 255 bb.23:256 successors: %bb.24(0x00000001), %bb.25(0x7fffffff)257 258 MOV32mi %80, 1, $noreg, 52, $noreg, @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private15_preEnd__authorEv259 %39:gr32_abcd = MOV32r0 implicit-def dead $eflags260 TEST8rr %39.sub_8bit, %39.sub_8bit, implicit-def $eflags261 JCC_1 %bb.25, 5, implicit killed $eflags262 JMP_1 %bb.24263 264 bb.24:265 successors: 266 267 268 bb.25:269 successors: %bb.27(0x7fffffff), %bb.26(0x00000001)270 271 %41:gr32_abcd = MOV32r0 implicit-def dead $eflags272 TEST8rr %41.sub_8bit, %41.sub_8bit, implicit-def $eflags273 JCC_1 %bb.27, 5, implicit killed $eflags274 JMP_1 %bb.26275 276 bb.26:277 successors: 278 279 280 bb.27:281 successors: %bb.29(0x7fffffff), %bb.28(0x00000001)282 283 %43:gr32_abcd = MOV32r0 implicit-def dead $eflags284 TEST8rr %43.sub_8bit, %43.sub_8bit, implicit-def $eflags285 JCC_1 %bb.29, 5, implicit killed $eflags286 JMP_1 %bb.28287 288 bb.28:289 successors: 290 291 292 bb.29:293 successors: %bb.31(0x7fffffff), %bb.30(0x00000001)294 295 %45:gr32_abcd = MOV32r0 implicit-def dead $eflags296 TEST8rr %45.sub_8bit, %45.sub_8bit, implicit-def $eflags297 JCC_1 %bb.31, 5, implicit killed $eflags298 JMP_1 %bb.30299 300 bb.30:301 successors: 302 303 304 bb.31:305 successors: %bb.32(0x00000001), %bb.33(0x7fffffff)306 307 %47:gr32_abcd = MOV32r0 implicit-def dead $eflags308 TEST8rr %47.sub_8bit, %47.sub_8bit, implicit-def $eflags309 JCC_1 %bb.33, 5, implicit killed $eflags310 JMP_1 %bb.32311 312 bb.32:313 successors: 314 315 316 bb.33:317 successors: %bb.37(0x30000000), %bb.34(0x50000000)318 319 %49:gr8 = MOV8ri 1320 TEST8rr %49, %49, implicit-def $eflags321 JCC_1 %bb.37, 5, implicit killed $eflags322 JMP_1 %bb.34323 324 bb.34:325 successors: %bb.36(0x00000001), %bb.35(0x7fffffff)326 327 %81:gr32_abcd = MOV32r0 implicit-def dead $eflags328 TEST8rr %81.sub_8bit, %81.sub_8bit, implicit-def $eflags329 JCC_1 %bb.36, 4, implicit killed $eflags330 331 bb.35:332 %82:gr32 = LEA32r %12, 1, $noreg, 80, $noreg333 JMP_1 %bb.38334 335 bb.36:336 successors: 337 338 339 bb.37:340 %81:gr32_abcd = COPY %0341 %82:gr32 = COPY %0342 343 bb.38:344 successors: %bb.40(0x7fffffff), %bb.39(0x00000001)345 346 ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp347 CALLpcrel32 @_Znwj, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp, implicit-def $eax348 ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp349 %52:gr32 = COPY killed $eax350 MOV32mr undef %53:gr32, 1, $noreg, 0, $noreg, %81351 MOV32mr %82, 1, $noreg, 0, $noreg, %52352 ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp353 CALLpcrel32 @_ZNSt3__127__tree_balance_after_insertIPNS_16__tree_node_baseIPvEEEEvT_S5_, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def $ssp354 ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp355 MOV32mi %52, 1, $noreg, 36, $noreg, @_ZN15COLLADASaxFWL1429ColladaParserAutoGen14Private14_end__commentsEv356 MOV32mr undef %54:gr32, 1, $noreg, 0, $noreg, %1357 %55:gr32 = MOV32rm %12, 1, $noreg, 140, $noreg358 CMP32mi8 %55, 1, $noreg, 0, $noreg, 0, implicit-def $eflags359 JCC_1 %bb.40, 4, implicit killed $eflags360 JMP_1 %bb.39361 362 bb.39:363 successors: 364 365 366 bb.40:367 successors: %bb.42(0x00000001), %bb.41(0x7fffffff)368 369 %56:gr32_abcd = MOV32r0 implicit-def dead $eflags370 TEST8rr %56.sub_8bit, %56.sub_8bit, implicit-def $eflags371 JCC_1 %bb.42, 5, implicit killed $eflags372 JMP_1 %bb.41373 374 bb.41:375 successors: %bb.43(0x00000001), %bb.44(0x7fffffff)376 377 %58:gr32_abcd = MOV32r0 implicit-def dead $eflags378 TEST8rr %58.sub_8bit, %58.sub_8bit, implicit-def $eflags379 JCC_1 %bb.43, 5, implicit killed $eflags380 JMP_1 %bb.44381 382 bb.42:383 successors: 384 385 386 bb.43:387 successors: 388 389 390 bb.44:391 successors: %bb.45(0x00000001), %bb.46(0x7fffffff)392 393 %60:gr32_abcd = MOV32r0 implicit-def dead $eflags394 TEST8rr %60.sub_8bit, %60.sub_8bit, implicit-def $eflags395 JCC_1 %bb.46, 5, implicit killed $eflags396 JMP_1 %bb.45397 398 bb.45:399 successors: 400 401 402 bb.46:403 successors: %bb.48(0x7fffffff), %bb.47(0x00000001)404 405 %62:gr32_abcd = MOV32r0 implicit-def dead $eflags406 TEST8rr %62.sub_8bit, %62.sub_8bit, implicit-def $eflags407 JCC_1 %bb.48, 5, implicit killed $eflags408 JMP_1 %bb.47409 410 bb.47:411 successors: 412 413 414 bb.48:415 successors: %bb.50(0x7fffffff), %bb.49(0x00000001)416 417 %64:gr32_abcd = MOV32r0 implicit-def dead $eflags418 TEST8rr %64.sub_8bit, %64.sub_8bit, implicit-def $eflags419 JCC_1 %bb.50, 5, implicit killed $eflags420 JMP_1 %bb.49421 422 bb.49:423 successors: 424 425 426 bb.50:427 successors: %bb.51(0x00000001), %bb.52(0x7fffffff)428 429 %66:gr32_abcd = MOV32r0 implicit-def dead $eflags430 TEST8rr %66.sub_8bit, %66.sub_8bit, implicit-def $eflags431 JCC_1 %bb.52, 5, implicit killed $eflags432 JMP_1 %bb.51433 434 bb.51:435 successors: 436 437 438 bb.52:439 successors: %bb.54(0x7fffffff), %bb.53(0x00000001)440 441 %68:gr32_abcd = MOV32r0 implicit-def dead $eflags442 TEST8rr %68.sub_8bit, %68.sub_8bit, implicit-def $eflags443 JCC_1 %bb.54, 5, implicit killed $eflags444 JMP_1 %bb.53445 446 bb.53:447 successors: 448 449 450 bb.54:451 successors: %bb.55(0x00000001), %bb.56(0x7fffffff)452 453 %70:gr32_abcd = MOV32r0 implicit-def dead $eflags454 TEST8rr %70.sub_8bit, %70.sub_8bit, implicit-def $eflags455 JCC_1 %bb.56, 5, implicit killed $eflags456 JMP_1 %bb.55457 458 bb.55:459 successors: 460 461 462 bb.56:463 successors: %bb.57(0x00000001), %bb.58(0x7fffffff)464 465 %72:gr32_abcd = MOV32r0 implicit-def dead $eflags466 TEST8rr %72.sub_8bit, %72.sub_8bit, implicit-def $eflags467 JCC_1 %bb.58, 5, implicit killed $eflags468 JMP_1 %bb.57469 470 bb.57:471 successors: 472 473 474 bb.58:475 successors: %bb.62(0x00000001), %bb.59(0x7fffffff)476 477 CMP32mi8 %0, 1, $noreg, 0, $noreg, 0, implicit-def $eflags478 JCC_1 %bb.62, 4, implicit killed $eflags479 JMP_1 %bb.59480 481 bb.59:482 483 bb.60:484 successors: %bb.60(0x7fffffff), %bb.61(0x00000001)485 486 CMP32ri undef %75:gr32, 95406325, implicit-def $eflags487 JCC_1 %bb.61, 2, implicit killed $eflags488 JMP_1 %bb.60489 490 bb.61:491 successors: 492 493 494 bb.62:495 successors: %bb.63, %bb.64496 497 %76:gr32_abcd = MOV32r0 implicit-def dead $eflags498 TEST8rr %76.sub_8bit, %76.sub_8bit, implicit-def $eflags499 JCC_1 %bb.64, 5, implicit killed $eflags500 JMP_1 %bb.63501 502 bb.63:503 successors: 504 505 506 bb.64:507 508...509