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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 22# RUN: llc -mtriple=x86_64-- -run-pass=register-coalescer -o - %s | FileCheck %s3 4# Test the implicit operands and operand flags on remateralized5# instructions folding into a sub or super register def.6 7# Test a full register def at %t1 rematerializing into a subregister8# use. The subregister dest operand should be dead, with an9# implicit-def of the full physical register.10 11---12name: rematerialize_super_register_into_subreg_def13tracksRegLiveness: true14body: |15 ; CHECK-LABEL: name: rematerialize_super_register_into_subreg_def16 ; CHECK: bb.0:17 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)18 ; CHECK-NEXT: {{ $}}19 ; CHECK-NEXT: %t3:gr64 = MOV64ri32 -1120 ; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags21 ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags22 ; CHECK-NEXT: JMP_1 %bb.123 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: bb.1:25 ; CHECK-NEXT: successors: %bb.1(0x80000000)26 ; CHECK-NEXT: {{ $}}27 ; CHECK-NEXT: dead $rax = MOV64ri32 -11, implicit-def $eax28 ; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags29 ; CHECK-NEXT: JCC_1 %bb.1, 4, implicit killed $eflags30 ; CHECK-NEXT: RET 0, $eax31 ; CHECK-NEXT: {{ $}}32 ; CHECK-NEXT: bb.2:33 ; CHECK-NEXT: successors: %bb.3(0x80000000)34 ; CHECK-NEXT: {{ $}}35 ; CHECK-NEXT: %t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags36 ; CHECK-NEXT: {{ $}}37 ; CHECK-NEXT: bb.3:38 ; CHECK-NEXT: $rax = COPY %t339 ; CHECK-NEXT: RET 0, $rax40 bb.0:41 %t1:gr64 = MOV64ri32 -1142 CMP64ri8 %t1, 1, implicit-def $eflags43 JCC_1 %bb.2, 4, implicit killed $eflags44 JMP_1 %bb.145 46 bb.1:47 %t2:gr64 = COPY %t148 $eax = COPY %t2.sub_32bit49 CMP64ri8 %t2, 1, implicit-def $eflags50 JCC_1 %bb.1, 4, implicit killed $eflags51 RET 0, $eax52 53 bb.2:54 %t3:gr64 = COPY %t155 %t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags56 57 bb.3:58 $rax = COPY %t359 RET 0, $rax60 61...62 63# Test an undef subregister def of %t1 rematerializing into a physical64# super register def65---66name: rematerialize_subregister_into_superreg_def67tracksRegLiveness: true68body: |69 ; CHECK-LABEL: name: rematerialize_subregister_into_superreg_def70 ; CHECK: bb.0:71 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)72 ; CHECK-NEXT: {{ $}}73 ; CHECK-NEXT: undef %t3.sub_32bit:gr64_with_sub_8bit = MOV32ri -1174 ; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags75 ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags76 ; CHECK-NEXT: JMP_1 %bb.177 ; CHECK-NEXT: {{ $}}78 ; CHECK-NEXT: bb.1:79 ; CHECK-NEXT: successors: %bb.1(0x80000000)80 ; CHECK-NEXT: {{ $}}81 ; CHECK-NEXT: dead $eax = MOV32ri -11, implicit-def $rax82 ; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags83 ; CHECK-NEXT: JCC_1 %bb.1, 4, implicit killed $eflags84 ; CHECK-NEXT: RET 0, $rax85 ; CHECK-NEXT: {{ $}}86 ; CHECK-NEXT: bb.2:87 ; CHECK-NEXT: successors: %bb.3(0x80000000)88 ; CHECK-NEXT: {{ $}}89 ; CHECK-NEXT: %t3:gr64_with_sub_8bit = ADD64ri8 %t3, 10, implicit-def $eflags90 ; CHECK-NEXT: {{ $}}91 ; CHECK-NEXT: bb.3:92 ; CHECK-NEXT: $rax = COPY %t393 ; CHECK-NEXT: RET 0, $rax94 bb.0:95 undef %t1.sub_32bit:gr64_with_sub_8bit = MOV32ri -1196 CMP64ri8 %t1, 1, implicit-def $eflags97 JCC_1 %bb.2, 4, implicit killed $eflags98 JMP_1 %bb.199 100 bb.1:101 %t2:gr64 = COPY %t1102 $rax = COPY %t2103 CMP64ri8 %t2, 1, implicit-def $eflags104 JCC_1 %bb.1, 4, implicit killed $eflags105 RET 0, $rax106 107 bb.2:108 %t3:gr64 = COPY %t1109 %t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags110 111 bb.3:112 $rax = COPY %t3113 RET 0, $rax114 115...116 117# Handle that rematerializing an instruction with an implicit def of a118# virtual super register into a physical register works.119---120name: rematerialize_subregister_into_superreg_def_with_impdef_physreg121tracksRegLiveness: true122body: |123 ; CHECK-LABEL: name: rematerialize_subregister_into_superreg_def_with_impdef_physreg124 ; CHECK: bb.0:125 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)126 ; CHECK-NEXT: {{ $}}127 ; CHECK-NEXT: undef %t3.sub_32bit:gr64_with_sub_8bit = MOV32ri -11, implicit-def %t3128 ; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags129 ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags130 ; CHECK-NEXT: JMP_1 %bb.1131 ; CHECK-NEXT: {{ $}}132 ; CHECK-NEXT: bb.1:133 ; CHECK-NEXT: successors: %bb.1(0x80000000)134 ; CHECK-NEXT: {{ $}}135 ; CHECK-NEXT: dead $eax = MOV32ri -11, implicit-def $rax136 ; CHECK-NEXT: CMP64ri8 %t3, 1, implicit-def $eflags137 ; CHECK-NEXT: JCC_1 %bb.1, 4, implicit killed $eflags138 ; CHECK-NEXT: RET 0, $rax139 ; CHECK-NEXT: {{ $}}140 ; CHECK-NEXT: bb.2:141 ; CHECK-NEXT: successors: %bb.3(0x80000000)142 ; CHECK-NEXT: {{ $}}143 ; CHECK-NEXT: %t3:gr64_with_sub_8bit = ADD64ri8 %t3, 10, implicit-def $eflags144 ; CHECK-NEXT: {{ $}}145 ; CHECK-NEXT: bb.3:146 ; CHECK-NEXT: $rax = COPY %t3147 ; CHECK-NEXT: RET 0, $rax148 bb.0:149 undef %t1.sub_32bit:gr64_with_sub_8bit = MOV32ri -11, implicit-def %t1150 CMP64ri8 %t1, 1, implicit-def $eflags151 JCC_1 %bb.2, 4, implicit killed $eflags152 JMP_1 %bb.1153 154 bb.1:155 %t2:gr64 = COPY %t1156 $rax = COPY %t2157 CMP64ri8 %t2, 1, implicit-def $eflags158 JCC_1 %bb.1, 4, implicit killed $eflags159 RET 0, $rax160 161 bb.2:162 %t3:gr64 = COPY %t1163 %t3:gr64 = ADD64ri8 %t3, 10, implicit-def $eflags164 165 bb.3:166 $rax = COPY %t3167 RET 0, $rax168...169---170name: rematerialize_superregister_into_subregister_def_with_impdef_physreg171body: |172 bb.0.entry:173 ; CHECK-LABEL: name: rematerialize_superregister_into_subregister_def_with_impdef_physreg174 ; CHECK: dead $esi = MOV32r0 implicit-def dead $eflags, implicit-def $rsi175 ; CHECK-NEXT: dead $edx = MOV32r0 implicit-def dead $eflags, implicit-def $rdx176 ; CHECK-NEXT: FAKE_USE implicit killed $rsi, implicit killed $rdx177 ; CHECK-NEXT: dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def dead $rax, implicit-def $al178 ; CHECK-NEXT: FAKE_USE implicit killed $al179 ; CHECK-NEXT: $eax = MOV32r0 implicit-def dead $eflags180 ; CHECK-NEXT: RET 0, $eax181 undef %1.sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags, implicit-def %1182 $rsi = COPY %1183 $rdx = COPY %1184 FAKE_USE implicit killed $rsi, implicit killed $rdx185 %4:gr8 = COPY killed %1.sub_8bit186 $al = COPY killed %4187 FAKE_USE implicit killed $al188 $eax = MOV32r0 implicit-def dead $eflags189 RET 0, killed $eax190