115 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X863; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X644; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX5 6define i32 @combine_f32(float %x) nounwind {7; X86-LABEL: combine_f32:8; X86: # %bb.0: # %entry9; X86-NEXT: cvtss2si {{[0-9]+}}(%esp), %eax10; X86-NEXT: retl11;12; X64-LABEL: combine_f32:13; X64: # %bb.0: # %entry14; X64-NEXT: cvtss2si %xmm0, %eax15; X64-NEXT: retq16;17; AVX-LABEL: combine_f32:18; AVX: # %bb.0: # %entry19; AVX-NEXT: vcvtss2si %xmm0, %eax20; AVX-NEXT: retq21entry:22 %0 = tail call float @llvm.rint.f32(float %x)23 %1 = fptosi float %0 to i3224 ret i32 %125}26 27define i32 @combine_f64(double %x) nounwind {28; X86-LABEL: combine_f64:29; X86: # %bb.0: # %entry30; X86-NEXT: cvtsd2si {{[0-9]+}}(%esp), %eax31; X86-NEXT: retl32;33; X64-LABEL: combine_f64:34; X64: # %bb.0: # %entry35; X64-NEXT: cvtsd2si %xmm0, %eax36; X64-NEXT: retq37;38; AVX-LABEL: combine_f64:39; AVX: # %bb.0: # %entry40; AVX-NEXT: vcvtsd2si %xmm0, %eax41; AVX-NEXT: retq42entry:43 %0 = tail call double @llvm.rint.f32(double %x)44 %1 = fptosi double %0 to i3245 ret i32 %146}47 48define <4 x i32> @combine_v4f32(<4 x float> %x) nounwind {49; X86-LABEL: combine_v4f32:50; X86: # %bb.0: # %entry51; X86-NEXT: cvtps2dq %xmm0, %xmm052; X86-NEXT: retl53;54; X64-LABEL: combine_v4f32:55; X64: # %bb.0: # %entry56; X64-NEXT: cvtps2dq %xmm0, %xmm057; X64-NEXT: retq58;59; AVX-LABEL: combine_v4f32:60; AVX: # %bb.0: # %entry61; AVX-NEXT: vcvtps2dq %xmm0, %xmm062; AVX-NEXT: retq63entry:64 %0 = tail call <4 x float> @llvm.rint.v4f32(<4 x float> %x)65 %1 = fptosi <4 x float> %0 to <4 x i32>66 ret <4 x i32> %167}68 69define <2 x i32> @combine_v2f64(<2 x double> %x) nounwind {70; X86-LABEL: combine_v2f64:71; X86: # %bb.0: # %entry72; X86-NEXT: cvtpd2dq %xmm0, %xmm073; X86-NEXT: retl74;75; X64-LABEL: combine_v2f64:76; X64: # %bb.0: # %entry77; X64-NEXT: cvtpd2dq %xmm0, %xmm078; X64-NEXT: retq79;80; AVX-LABEL: combine_v2f64:81; AVX: # %bb.0: # %entry82; AVX-NEXT: vcvtpd2dq %xmm0, %xmm083; AVX-NEXT: retq84entry:85 %0 = tail call <2 x double> @llvm.rint.v2f64(<2 x double> %x)86 %1 = fptosi <2 x double> %0 to <2 x i32>87 ret <2 x i32> %188}89 90define <4 x i32> @combine_v4f64(<4 x double> %x) nounwind {91; X86-LABEL: combine_v4f64:92; X86: # %bb.0: # %entry93; X86-NEXT: cvtpd2dq %xmm1, %xmm194; X86-NEXT: cvtpd2dq %xmm0, %xmm095; X86-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]96; X86-NEXT: retl97;98; X64-LABEL: combine_v4f64:99; X64: # %bb.0: # %entry100; X64-NEXT: cvtpd2dq %xmm1, %xmm1101; X64-NEXT: cvtpd2dq %xmm0, %xmm0102; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]103; X64-NEXT: retq104;105; AVX-LABEL: combine_v4f64:106; AVX: # %bb.0: # %entry107; AVX-NEXT: vcvtpd2dq %ymm0, %xmm0108; AVX-NEXT: vzeroupper109; AVX-NEXT: retq110entry:111 %0 = tail call <4 x double> @llvm.rint.v4f64(<4 x double> %x)112 %1 = fptosi <4 x double> %0 to <4 x i32>113 ret <4 x i32> %1114}115