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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s3 4; Check that widening doesn't introduce a mmx register in this case when5; a simple load/store would suffice.6 7define void @foo(ptr %A, ptr %B) {8; CHECK-LABEL: foo:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax11; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx12; CHECK-NEXT: movl (%ecx), %ecx13; CHECK-NEXT: movl %ecx, (%eax)14; CHECK-NEXT: retl15entry:16 %tmp1 = load <2 x i16>, ptr %A ; <<2 x i16>> [#uses=1]17 store <2 x i16> %tmp1, ptr %B18 ret void19}20 21