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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512DQVL_323; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK64,AVX512_644; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512DQ_325; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK64,AVX512_646; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512F_327; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK64,AVX512_648; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK32,SSE_32,SSE2_329; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK64,SSE2_6410; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse | FileCheck %s --check-prefixes=CHECK32,SSE_32,SSE1_3211; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=-sse | FileCheck %s --check-prefixes=CHECK32,X8712 13; Verify that scalar integer conversions to FP compile successfully14; (at one time long double failed with avx512f), and that reasonable15; instruction sequences are selected based on subtarget features.16 17define float @u32_to_f(i32 %a) nounwind {18; AVX512_32-LABEL: u32_to_f:19; AVX512_32: # %bb.0:20; AVX512_32-NEXT: pushl %eax21; AVX512_32-NEXT: vcvtusi2ssl {{[0-9]+}}(%esp), %xmm7, %xmm022; AVX512_32-NEXT: vmovss %xmm0, (%esp)23; AVX512_32-NEXT: flds (%esp)24; AVX512_32-NEXT: popl %eax25; AVX512_32-NEXT: retl26;27; AVX512_64-LABEL: u32_to_f:28; AVX512_64: # %bb.0:29; AVX512_64-NEXT: vcvtusi2ss %edi, %xmm15, %xmm030; AVX512_64-NEXT: retq31;32; SSE2_32-LABEL: u32_to_f:33; SSE2_32: # %bb.0:34; SSE2_32-NEXT: pushl %eax35; SSE2_32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero36; SSE2_32-NEXT: orpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm037; SSE2_32-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm038; SSE2_32-NEXT: cvtsd2ss %xmm0, %xmm039; SSE2_32-NEXT: movss %xmm0, (%esp)40; SSE2_32-NEXT: flds (%esp)41; SSE2_32-NEXT: popl %eax42; SSE2_32-NEXT: retl43;44; SSE2_64-LABEL: u32_to_f:45; SSE2_64: # %bb.0:46; SSE2_64-NEXT: movl %edi, %eax47; SSE2_64-NEXT: cvtsi2ss %rax, %xmm048; SSE2_64-NEXT: retq49;50; SSE1_32-LABEL: u32_to_f:51; SSE1_32: # %bb.0:52; SSE1_32-NEXT: pushl %ebp53; SSE1_32-NEXT: movl %esp, %ebp54; SSE1_32-NEXT: andl $-8, %esp55; SSE1_32-NEXT: subl $16, %esp56; SSE1_32-NEXT: movl 8(%ebp), %eax57; SSE1_32-NEXT: movl %eax, {{[0-9]+}}(%esp)58; SSE1_32-NEXT: movl $0, {{[0-9]+}}(%esp)59; SSE1_32-NEXT: fildll {{[0-9]+}}(%esp)60; SSE1_32-NEXT: fstps {{[0-9]+}}(%esp)61; SSE1_32-NEXT: flds {{[0-9]+}}(%esp)62; SSE1_32-NEXT: movl %ebp, %esp63; SSE1_32-NEXT: popl %ebp64; SSE1_32-NEXT: retl65;66; X87-LABEL: u32_to_f:67; X87: # %bb.0:68; X87-NEXT: pushl %ebp69; X87-NEXT: movl %esp, %ebp70; X87-NEXT: andl $-8, %esp71; X87-NEXT: subl $8, %esp72; X87-NEXT: movl 8(%ebp), %eax73; X87-NEXT: movl %eax, (%esp)74; X87-NEXT: movl $0, {{[0-9]+}}(%esp)75; X87-NEXT: fildll (%esp)76; X87-NEXT: movl %ebp, %esp77; X87-NEXT: popl %ebp78; X87-NEXT: retl79 %r = uitofp i32 %a to float80 ret float %r81}82 83define float @s32_to_f(i32 %a) nounwind {84; AVX512_32-LABEL: s32_to_f:85; AVX512_32: # %bb.0:86; AVX512_32-NEXT: pushl %eax87; AVX512_32-NEXT: vcvtsi2ssl {{[0-9]+}}(%esp), %xmm7, %xmm088; AVX512_32-NEXT: vmovss %xmm0, (%esp)89; AVX512_32-NEXT: flds (%esp)90; AVX512_32-NEXT: popl %eax91; AVX512_32-NEXT: retl92;93; AVX512_64-LABEL: s32_to_f:94; AVX512_64: # %bb.0:95; AVX512_64-NEXT: vcvtsi2ss %edi, %xmm15, %xmm096; AVX512_64-NEXT: retq97;98; SSE_32-LABEL: s32_to_f:99; SSE_32: # %bb.0:100; SSE_32-NEXT: pushl %eax101; SSE_32-NEXT: cvtsi2ssl {{[0-9]+}}(%esp), %xmm0102; SSE_32-NEXT: movss %xmm0, (%esp)103; SSE_32-NEXT: flds (%esp)104; SSE_32-NEXT: popl %eax105; SSE_32-NEXT: retl106;107; SSE2_64-LABEL: s32_to_f:108; SSE2_64: # %bb.0:109; SSE2_64-NEXT: cvtsi2ss %edi, %xmm0110; SSE2_64-NEXT: retq111;112; X87-LABEL: s32_to_f:113; X87: # %bb.0:114; X87-NEXT: pushl %eax115; X87-NEXT: movl {{[0-9]+}}(%esp), %eax116; X87-NEXT: movl %eax, (%esp)117; X87-NEXT: fildl (%esp)118; X87-NEXT: popl %eax119; X87-NEXT: retl120 %r = sitofp i32 %a to float121 ret float %r122}123 124define double @u32_to_d(i32 %a) nounwind {125; AVX512_32-LABEL: u32_to_d:126; AVX512_32: # %bb.0:127; AVX512_32-NEXT: pushl %ebp128; AVX512_32-NEXT: movl %esp, %ebp129; AVX512_32-NEXT: andl $-8, %esp130; AVX512_32-NEXT: subl $8, %esp131; AVX512_32-NEXT: vcvtusi2sdl 8(%ebp), %xmm7, %xmm0132; AVX512_32-NEXT: vmovsd %xmm0, (%esp)133; AVX512_32-NEXT: fldl (%esp)134; AVX512_32-NEXT: movl %ebp, %esp135; AVX512_32-NEXT: popl %ebp136; AVX512_32-NEXT: retl137;138; AVX512_64-LABEL: u32_to_d:139; AVX512_64: # %bb.0:140; AVX512_64-NEXT: vcvtusi2sd %edi, %xmm15, %xmm0141; AVX512_64-NEXT: retq142;143; SSE2_32-LABEL: u32_to_d:144; SSE2_32: # %bb.0:145; SSE2_32-NEXT: pushl %ebp146; SSE2_32-NEXT: movl %esp, %ebp147; SSE2_32-NEXT: andl $-8, %esp148; SSE2_32-NEXT: subl $8, %esp149; SSE2_32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero150; SSE2_32-NEXT: orpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0151; SSE2_32-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0152; SSE2_32-NEXT: movsd %xmm0, (%esp)153; SSE2_32-NEXT: fldl (%esp)154; SSE2_32-NEXT: movl %ebp, %esp155; SSE2_32-NEXT: popl %ebp156; SSE2_32-NEXT: retl157;158; SSE2_64-LABEL: u32_to_d:159; SSE2_64: # %bb.0:160; SSE2_64-NEXT: movl %edi, %eax161; SSE2_64-NEXT: cvtsi2sd %rax, %xmm0162; SSE2_64-NEXT: retq163;164; SSE1_32-LABEL: u32_to_d:165; SSE1_32: # %bb.0:166; SSE1_32-NEXT: pushl %ebp167; SSE1_32-NEXT: movl %esp, %ebp168; SSE1_32-NEXT: andl $-8, %esp169; SSE1_32-NEXT: subl $8, %esp170; SSE1_32-NEXT: movl 8(%ebp), %eax171; SSE1_32-NEXT: movl %eax, (%esp)172; SSE1_32-NEXT: movl $0, {{[0-9]+}}(%esp)173; SSE1_32-NEXT: fildll (%esp)174; SSE1_32-NEXT: movl %ebp, %esp175; SSE1_32-NEXT: popl %ebp176; SSE1_32-NEXT: retl177;178; X87-LABEL: u32_to_d:179; X87: # %bb.0:180; X87-NEXT: pushl %ebp181; X87-NEXT: movl %esp, %ebp182; X87-NEXT: andl $-8, %esp183; X87-NEXT: subl $8, %esp184; X87-NEXT: movl 8(%ebp), %eax185; X87-NEXT: movl %eax, (%esp)186; X87-NEXT: movl $0, {{[0-9]+}}(%esp)187; X87-NEXT: fildll (%esp)188; X87-NEXT: movl %ebp, %esp189; X87-NEXT: popl %ebp190; X87-NEXT: retl191 %r = uitofp i32 %a to double192 ret double %r193}194 195define double @s32_to_d(i32 %a) nounwind {196; AVX512_32-LABEL: s32_to_d:197; AVX512_32: # %bb.0:198; AVX512_32-NEXT: pushl %ebp199; AVX512_32-NEXT: movl %esp, %ebp200; AVX512_32-NEXT: andl $-8, %esp201; AVX512_32-NEXT: subl $8, %esp202; AVX512_32-NEXT: vcvtsi2sdl 8(%ebp), %xmm7, %xmm0203; AVX512_32-NEXT: vmovsd %xmm0, (%esp)204; AVX512_32-NEXT: fldl (%esp)205; AVX512_32-NEXT: movl %ebp, %esp206; AVX512_32-NEXT: popl %ebp207; AVX512_32-NEXT: retl208;209; AVX512_64-LABEL: s32_to_d:210; AVX512_64: # %bb.0:211; AVX512_64-NEXT: vcvtsi2sd %edi, %xmm15, %xmm0212; AVX512_64-NEXT: retq213;214; SSE2_32-LABEL: s32_to_d:215; SSE2_32: # %bb.0:216; SSE2_32-NEXT: pushl %ebp217; SSE2_32-NEXT: movl %esp, %ebp218; SSE2_32-NEXT: andl $-8, %esp219; SSE2_32-NEXT: subl $8, %esp220; SSE2_32-NEXT: cvtsi2sdl 8(%ebp), %xmm0221; SSE2_32-NEXT: movsd %xmm0, (%esp)222; SSE2_32-NEXT: fldl (%esp)223; SSE2_32-NEXT: movl %ebp, %esp224; SSE2_32-NEXT: popl %ebp225; SSE2_32-NEXT: retl226;227; SSE2_64-LABEL: s32_to_d:228; SSE2_64: # %bb.0:229; SSE2_64-NEXT: cvtsi2sd %edi, %xmm0230; SSE2_64-NEXT: retq231;232; SSE1_32-LABEL: s32_to_d:233; SSE1_32: # %bb.0:234; SSE1_32-NEXT: pushl %eax235; SSE1_32-NEXT: movl {{[0-9]+}}(%esp), %eax236; SSE1_32-NEXT: movl %eax, (%esp)237; SSE1_32-NEXT: fildl (%esp)238; SSE1_32-NEXT: popl %eax239; SSE1_32-NEXT: retl240;241; X87-LABEL: s32_to_d:242; X87: # %bb.0:243; X87-NEXT: pushl %eax244; X87-NEXT: movl {{[0-9]+}}(%esp), %eax245; X87-NEXT: movl %eax, (%esp)246; X87-NEXT: fildl (%esp)247; X87-NEXT: popl %eax248; X87-NEXT: retl249 %r = sitofp i32 %a to double250 ret double %r251}252 253define x86_fp80 @u32_to_x(i32 %a) nounwind {254; CHECK32-LABEL: u32_to_x:255; CHECK32: # %bb.0:256; CHECK32-NEXT: pushl %ebp257; CHECK32-NEXT: movl %esp, %ebp258; CHECK32-NEXT: andl $-8, %esp259; CHECK32-NEXT: subl $8, %esp260; CHECK32-NEXT: movl 8(%ebp), %eax261; CHECK32-NEXT: movl %eax, (%esp)262; CHECK32-NEXT: movl $0, {{[0-9]+}}(%esp)263; CHECK32-NEXT: fildll (%esp)264; CHECK32-NEXT: movl %ebp, %esp265; CHECK32-NEXT: popl %ebp266; CHECK32-NEXT: retl267;268; CHECK64-LABEL: u32_to_x:269; CHECK64: # %bb.0:270; CHECK64-NEXT: movl %edi, %eax271; CHECK64-NEXT: movq %rax, -{{[0-9]+}}(%rsp)272; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)273; CHECK64-NEXT: retq274 %r = uitofp i32 %a to x86_fp80275 ret x86_fp80 %r276}277 278define x86_fp80 @s32_to_x(i32 %a) nounwind {279; CHECK32-LABEL: s32_to_x:280; CHECK32: # %bb.0:281; CHECK32-NEXT: pushl %eax282; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax283; CHECK32-NEXT: movl %eax, (%esp)284; CHECK32-NEXT: fildl (%esp)285; CHECK32-NEXT: popl %eax286; CHECK32-NEXT: retl287;288; CHECK64-LABEL: s32_to_x:289; CHECK64: # %bb.0:290; CHECK64-NEXT: movl %edi, -{{[0-9]+}}(%rsp)291; CHECK64-NEXT: fildl -{{[0-9]+}}(%rsp)292; CHECK64-NEXT: retq293 %r = sitofp i32 %a to x86_fp80294 ret x86_fp80 %r295}296 297define float @u64_to_f(i64 %a) nounwind {298; AVX512DQVL_32-LABEL: u64_to_f:299; AVX512DQVL_32: # %bb.0:300; AVX512DQVL_32-NEXT: pushl %eax301; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero302; AVX512DQVL_32-NEXT: vcvtuqq2ps %ymm0, %xmm0303; AVX512DQVL_32-NEXT: vmovss %xmm0, (%esp)304; AVX512DQVL_32-NEXT: flds (%esp)305; AVX512DQVL_32-NEXT: popl %eax306; AVX512DQVL_32-NEXT: vzeroupper307; AVX512DQVL_32-NEXT: retl308;309; AVX512_64-LABEL: u64_to_f:310; AVX512_64: # %bb.0:311; AVX512_64-NEXT: vcvtusi2ss %rdi, %xmm15, %xmm0312; AVX512_64-NEXT: retq313;314; AVX512DQ_32-LABEL: u64_to_f:315; AVX512DQ_32: # %bb.0:316; AVX512DQ_32-NEXT: pushl %eax317; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero318; AVX512DQ_32-NEXT: vcvtuqq2ps %zmm0, %ymm0319; AVX512DQ_32-NEXT: vmovss %xmm0, (%esp)320; AVX512DQ_32-NEXT: flds (%esp)321; AVX512DQ_32-NEXT: popl %eax322; AVX512DQ_32-NEXT: vzeroupper323; AVX512DQ_32-NEXT: retl324;325; AVX512F_32-LABEL: u64_to_f:326; AVX512F_32: # %bb.0:327; AVX512F_32-NEXT: pushl %ebp328; AVX512F_32-NEXT: movl %esp, %ebp329; AVX512F_32-NEXT: andl $-8, %esp330; AVX512F_32-NEXT: subl $16, %esp331; AVX512F_32-NEXT: movl 12(%ebp), %eax332; AVX512F_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero333; AVX512F_32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)334; AVX512F_32-NEXT: shrl $31, %eax335; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)336; AVX512F_32-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%eax,4)337; AVX512F_32-NEXT: fstps {{[0-9]+}}(%esp)338; AVX512F_32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero339; AVX512F_32-NEXT: vmovss %xmm0, (%esp)340; AVX512F_32-NEXT: flds (%esp)341; AVX512F_32-NEXT: movl %ebp, %esp342; AVX512F_32-NEXT: popl %ebp343; AVX512F_32-NEXT: retl344;345; SSE2_32-LABEL: u64_to_f:346; SSE2_32: # %bb.0:347; SSE2_32-NEXT: pushl %ebp348; SSE2_32-NEXT: movl %esp, %ebp349; SSE2_32-NEXT: andl $-8, %esp350; SSE2_32-NEXT: subl $16, %esp351; SSE2_32-NEXT: movl 12(%ebp), %eax352; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero353; SSE2_32-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)354; SSE2_32-NEXT: shrl $31, %eax355; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)356; SSE2_32-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%eax,4)357; SSE2_32-NEXT: fstps {{[0-9]+}}(%esp)358; SSE2_32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero359; SSE2_32-NEXT: movss %xmm0, (%esp)360; SSE2_32-NEXT: flds (%esp)361; SSE2_32-NEXT: movl %ebp, %esp362; SSE2_32-NEXT: popl %ebp363; SSE2_32-NEXT: retl364;365; SSE2_64-LABEL: u64_to_f:366; SSE2_64: # %bb.0:367; SSE2_64-NEXT: testq %rdi, %rdi368; SSE2_64-NEXT: js .LBB6_1369; SSE2_64-NEXT: # %bb.2:370; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0371; SSE2_64-NEXT: retq372; SSE2_64-NEXT: .LBB6_1:373; SSE2_64-NEXT: movq %rdi, %rax374; SSE2_64-NEXT: shrq %rax375; SSE2_64-NEXT: andl $1, %edi376; SSE2_64-NEXT: orq %rax, %rdi377; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0378; SSE2_64-NEXT: addss %xmm0, %xmm0379; SSE2_64-NEXT: retq380;381; SSE1_32-LABEL: u64_to_f:382; SSE1_32: # %bb.0:383; SSE1_32-NEXT: pushl %ebp384; SSE1_32-NEXT: movl %esp, %ebp385; SSE1_32-NEXT: andl $-8, %esp386; SSE1_32-NEXT: subl $24, %esp387; SSE1_32-NEXT: movl 8(%ebp), %eax388; SSE1_32-NEXT: movl 12(%ebp), %ecx389; SSE1_32-NEXT: movl %ecx, {{[0-9]+}}(%esp)390; SSE1_32-NEXT: movl %eax, {{[0-9]+}}(%esp)391; SSE1_32-NEXT: fldl {{[0-9]+}}(%esp)392; SSE1_32-NEXT: fstpl {{[0-9]+}}(%esp)393; SSE1_32-NEXT: shrl $31, %ecx394; SSE1_32-NEXT: fildll {{[0-9]+}}(%esp)395; SSE1_32-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)396; SSE1_32-NEXT: fstps {{[0-9]+}}(%esp)397; SSE1_32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero398; SSE1_32-NEXT: movss %xmm0, (%esp)399; SSE1_32-NEXT: flds (%esp)400; SSE1_32-NEXT: movl %ebp, %esp401; SSE1_32-NEXT: popl %ebp402; SSE1_32-NEXT: retl403;404; X87-LABEL: u64_to_f:405; X87: # %bb.0:406; X87-NEXT: pushl %ebp407; X87-NEXT: movl %esp, %ebp408; X87-NEXT: andl $-8, %esp409; X87-NEXT: subl $16, %esp410; X87-NEXT: movl 8(%ebp), %eax411; X87-NEXT: movl 12(%ebp), %ecx412; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)413; X87-NEXT: movl %eax, {{[0-9]+}}(%esp)414; X87-NEXT: shrl $31, %ecx415; X87-NEXT: fildll {{[0-9]+}}(%esp)416; X87-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)417; X87-NEXT: fstps {{[0-9]+}}(%esp)418; X87-NEXT: flds {{[0-9]+}}(%esp)419; X87-NEXT: movl %ebp, %esp420; X87-NEXT: popl %ebp421; X87-NEXT: retl422 %r = uitofp i64 %a to float423 ret float %r424}425 426define float @s64_to_f(i64 %a) nounwind {427; AVX512DQVL_32-LABEL: s64_to_f:428; AVX512DQVL_32: # %bb.0:429; AVX512DQVL_32-NEXT: pushl %eax430; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero431; AVX512DQVL_32-NEXT: vcvtqq2ps %ymm0, %xmm0432; AVX512DQVL_32-NEXT: vmovss %xmm0, (%esp)433; AVX512DQVL_32-NEXT: flds (%esp)434; AVX512DQVL_32-NEXT: popl %eax435; AVX512DQVL_32-NEXT: vzeroupper436; AVX512DQVL_32-NEXT: retl437;438; AVX512_64-LABEL: s64_to_f:439; AVX512_64: # %bb.0:440; AVX512_64-NEXT: vcvtsi2ss %rdi, %xmm15, %xmm0441; AVX512_64-NEXT: retq442;443; AVX512DQ_32-LABEL: s64_to_f:444; AVX512DQ_32: # %bb.0:445; AVX512DQ_32-NEXT: pushl %eax446; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero447; AVX512DQ_32-NEXT: vcvtqq2ps %zmm0, %ymm0448; AVX512DQ_32-NEXT: vmovss %xmm0, (%esp)449; AVX512DQ_32-NEXT: flds (%esp)450; AVX512DQ_32-NEXT: popl %eax451; AVX512DQ_32-NEXT: vzeroupper452; AVX512DQ_32-NEXT: retl453;454; AVX512F_32-LABEL: s64_to_f:455; AVX512F_32: # %bb.0:456; AVX512F_32-NEXT: pushl %eax457; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)458; AVX512F_32-NEXT: fstps (%esp)459; AVX512F_32-NEXT: flds (%esp)460; AVX512F_32-NEXT: popl %eax461; AVX512F_32-NEXT: retl462;463; SSE_32-LABEL: s64_to_f:464; SSE_32: # %bb.0:465; SSE_32-NEXT: pushl %eax466; SSE_32-NEXT: fildll {{[0-9]+}}(%esp)467; SSE_32-NEXT: fstps (%esp)468; SSE_32-NEXT: flds (%esp)469; SSE_32-NEXT: popl %eax470; SSE_32-NEXT: retl471;472; SSE2_64-LABEL: s64_to_f:473; SSE2_64: # %bb.0:474; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0475; SSE2_64-NEXT: retq476;477; X87-LABEL: s64_to_f:478; X87: # %bb.0:479; X87-NEXT: fildll {{[0-9]+}}(%esp)480; X87-NEXT: retl481 %r = sitofp i64 %a to float482 ret float %r483}484 485define float @s64_to_f_2(i64 %a) nounwind {486; AVX512DQVL_32-LABEL: s64_to_f_2:487; AVX512DQVL_32: # %bb.0:488; AVX512DQVL_32-NEXT: pushl %eax489; AVX512DQVL_32-NEXT: movl {{[0-9]+}}(%esp), %eax490; AVX512DQVL_32-NEXT: movl {{[0-9]+}}(%esp), %ecx491; AVX512DQVL_32-NEXT: addl $5, %eax492; AVX512DQVL_32-NEXT: adcl $0, %ecx493; AVX512DQVL_32-NEXT: vmovd %eax, %xmm0494; AVX512DQVL_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0495; AVX512DQVL_32-NEXT: vcvtqq2ps %ymm0, %xmm0496; AVX512DQVL_32-NEXT: vmovss %xmm0, (%esp)497; AVX512DQVL_32-NEXT: flds (%esp)498; AVX512DQVL_32-NEXT: popl %eax499; AVX512DQVL_32-NEXT: vzeroupper500; AVX512DQVL_32-NEXT: retl501;502; AVX512_64-LABEL: s64_to_f_2:503; AVX512_64: # %bb.0:504; AVX512_64-NEXT: addq $5, %rdi505; AVX512_64-NEXT: vcvtsi2ss %rdi, %xmm15, %xmm0506; AVX512_64-NEXT: retq507;508; AVX512DQ_32-LABEL: s64_to_f_2:509; AVX512DQ_32: # %bb.0:510; AVX512DQ_32-NEXT: pushl %eax511; AVX512DQ_32-NEXT: movl {{[0-9]+}}(%esp), %eax512; AVX512DQ_32-NEXT: movl {{[0-9]+}}(%esp), %ecx513; AVX512DQ_32-NEXT: addl $5, %eax514; AVX512DQ_32-NEXT: adcl $0, %ecx515; AVX512DQ_32-NEXT: vmovd %eax, %xmm0516; AVX512DQ_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0517; AVX512DQ_32-NEXT: vcvtqq2ps %zmm0, %ymm0518; AVX512DQ_32-NEXT: vmovss %xmm0, (%esp)519; AVX512DQ_32-NEXT: flds (%esp)520; AVX512DQ_32-NEXT: popl %eax521; AVX512DQ_32-NEXT: vzeroupper522; AVX512DQ_32-NEXT: retl523;524; AVX512F_32-LABEL: s64_to_f_2:525; AVX512F_32: # %bb.0:526; AVX512F_32-NEXT: pushl %ebp527; AVX512F_32-NEXT: movl %esp, %ebp528; AVX512F_32-NEXT: andl $-8, %esp529; AVX512F_32-NEXT: subl $16, %esp530; AVX512F_32-NEXT: movl 8(%ebp), %eax531; AVX512F_32-NEXT: movl 12(%ebp), %ecx532; AVX512F_32-NEXT: addl $5, %eax533; AVX512F_32-NEXT: adcl $0, %ecx534; AVX512F_32-NEXT: vmovd %eax, %xmm0535; AVX512F_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0536; AVX512F_32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)537; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)538; AVX512F_32-NEXT: fstps {{[0-9]+}}(%esp)539; AVX512F_32-NEXT: flds {{[0-9]+}}(%esp)540; AVX512F_32-NEXT: movl %ebp, %esp541; AVX512F_32-NEXT: popl %ebp542; AVX512F_32-NEXT: retl543;544; SSE2_32-LABEL: s64_to_f_2:545; SSE2_32: # %bb.0:546; SSE2_32-NEXT: pushl %ebp547; SSE2_32-NEXT: movl %esp, %ebp548; SSE2_32-NEXT: andl $-8, %esp549; SSE2_32-NEXT: subl $16, %esp550; SSE2_32-NEXT: movl 8(%ebp), %eax551; SSE2_32-NEXT: movl 12(%ebp), %ecx552; SSE2_32-NEXT: addl $5, %eax553; SSE2_32-NEXT: adcl $0, %ecx554; SSE2_32-NEXT: movd %ecx, %xmm0555; SSE2_32-NEXT: movd %eax, %xmm1556; SSE2_32-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]557; SSE2_32-NEXT: movq %xmm1, {{[0-9]+}}(%esp)558; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)559; SSE2_32-NEXT: fstps {{[0-9]+}}(%esp)560; SSE2_32-NEXT: flds {{[0-9]+}}(%esp)561; SSE2_32-NEXT: movl %ebp, %esp562; SSE2_32-NEXT: popl %ebp563; SSE2_32-NEXT: retl564;565; SSE2_64-LABEL: s64_to_f_2:566; SSE2_64: # %bb.0:567; SSE2_64-NEXT: addq $5, %rdi568; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0569; SSE2_64-NEXT: retq570;571; SSE1_32-LABEL: s64_to_f_2:572; SSE1_32: # %bb.0:573; SSE1_32-NEXT: pushl %ebp574; SSE1_32-NEXT: movl %esp, %ebp575; SSE1_32-NEXT: andl $-8, %esp576; SSE1_32-NEXT: subl $16, %esp577; SSE1_32-NEXT: movl 8(%ebp), %eax578; SSE1_32-NEXT: movl 12(%ebp), %ecx579; SSE1_32-NEXT: addl $5, %eax580; SSE1_32-NEXT: adcl $0, %ecx581; SSE1_32-NEXT: movl %eax, {{[0-9]+}}(%esp)582; SSE1_32-NEXT: movl %ecx, {{[0-9]+}}(%esp)583; SSE1_32-NEXT: fildll {{[0-9]+}}(%esp)584; SSE1_32-NEXT: fstps {{[0-9]+}}(%esp)585; SSE1_32-NEXT: flds {{[0-9]+}}(%esp)586; SSE1_32-NEXT: movl %ebp, %esp587; SSE1_32-NEXT: popl %ebp588; SSE1_32-NEXT: retl589;590; X87-LABEL: s64_to_f_2:591; X87: # %bb.0:592; X87-NEXT: pushl %ebp593; X87-NEXT: movl %esp, %ebp594; X87-NEXT: andl $-8, %esp595; X87-NEXT: subl $8, %esp596; X87-NEXT: movl 8(%ebp), %eax597; X87-NEXT: movl 12(%ebp), %ecx598; X87-NEXT: addl $5, %eax599; X87-NEXT: adcl $0, %ecx600; X87-NEXT: movl %eax, (%esp)601; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)602; X87-NEXT: fildll (%esp)603; X87-NEXT: movl %ebp, %esp604; X87-NEXT: popl %ebp605; X87-NEXT: retl606 %a1 = add i64 %a, 5607 %r = sitofp i64 %a1 to float608 ret float %r609}610 611define double @u64_to_d(i64 %a) nounwind {612; AVX512DQVL_32-LABEL: u64_to_d:613; AVX512DQVL_32: # %bb.0:614; AVX512DQVL_32-NEXT: pushl %ebp615; AVX512DQVL_32-NEXT: movl %esp, %ebp616; AVX512DQVL_32-NEXT: andl $-8, %esp617; AVX512DQVL_32-NEXT: subl $8, %esp618; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero619; AVX512DQVL_32-NEXT: vcvtuqq2pd %ymm0, %ymm0620; AVX512DQVL_32-NEXT: vmovlps %xmm0, (%esp)621; AVX512DQVL_32-NEXT: fldl (%esp)622; AVX512DQVL_32-NEXT: movl %ebp, %esp623; AVX512DQVL_32-NEXT: popl %ebp624; AVX512DQVL_32-NEXT: vzeroupper625; AVX512DQVL_32-NEXT: retl626;627; AVX512_64-LABEL: u64_to_d:628; AVX512_64: # %bb.0:629; AVX512_64-NEXT: vcvtusi2sd %rdi, %xmm15, %xmm0630; AVX512_64-NEXT: retq631;632; AVX512DQ_32-LABEL: u64_to_d:633; AVX512DQ_32: # %bb.0:634; AVX512DQ_32-NEXT: pushl %ebp635; AVX512DQ_32-NEXT: movl %esp, %ebp636; AVX512DQ_32-NEXT: andl $-8, %esp637; AVX512DQ_32-NEXT: subl $8, %esp638; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero639; AVX512DQ_32-NEXT: vcvtuqq2pd %zmm0, %zmm0640; AVX512DQ_32-NEXT: vmovlps %xmm0, (%esp)641; AVX512DQ_32-NEXT: fldl (%esp)642; AVX512DQ_32-NEXT: movl %ebp, %esp643; AVX512DQ_32-NEXT: popl %ebp644; AVX512DQ_32-NEXT: vzeroupper645; AVX512DQ_32-NEXT: retl646;647; AVX512F_32-LABEL: u64_to_d:648; AVX512F_32: # %bb.0:649; AVX512F_32-NEXT: pushl %ebp650; AVX512F_32-NEXT: movl %esp, %ebp651; AVX512F_32-NEXT: andl $-8, %esp652; AVX512F_32-NEXT: subl $8, %esp653; AVX512F_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero654; AVX512F_32-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]655; AVX512F_32-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0656; AVX512F_32-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]657; AVX512F_32-NEXT: vaddsd %xmm0, %xmm1, %xmm0658; AVX512F_32-NEXT: vmovsd %xmm0, (%esp)659; AVX512F_32-NEXT: fldl (%esp)660; AVX512F_32-NEXT: movl %ebp, %esp661; AVX512F_32-NEXT: popl %ebp662; AVX512F_32-NEXT: retl663;664; SSE2_32-LABEL: u64_to_d:665; SSE2_32: # %bb.0:666; SSE2_32-NEXT: pushl %ebp667; SSE2_32-NEXT: movl %esp, %ebp668; SSE2_32-NEXT: andl $-8, %esp669; SSE2_32-NEXT: subl $8, %esp670; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero671; SSE2_32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]672; SSE2_32-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0673; SSE2_32-NEXT: movapd %xmm0, %xmm1674; SSE2_32-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]675; SSE2_32-NEXT: addsd %xmm0, %xmm1676; SSE2_32-NEXT: movsd %xmm1, (%esp)677; SSE2_32-NEXT: fldl (%esp)678; SSE2_32-NEXT: movl %ebp, %esp679; SSE2_32-NEXT: popl %ebp680; SSE2_32-NEXT: retl681;682; SSE2_64-LABEL: u64_to_d:683; SSE2_64: # %bb.0:684; SSE2_64-NEXT: movq %rdi, %xmm1685; SSE2_64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]686; SSE2_64-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1687; SSE2_64-NEXT: movapd %xmm1, %xmm0688; SSE2_64-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]689; SSE2_64-NEXT: addsd %xmm1, %xmm0690; SSE2_64-NEXT: retq691;692; SSE1_32-LABEL: u64_to_d:693; SSE1_32: # %bb.0:694; SSE1_32-NEXT: pushl %ebp695; SSE1_32-NEXT: movl %esp, %ebp696; SSE1_32-NEXT: andl $-8, %esp697; SSE1_32-NEXT: subl $16, %esp698; SSE1_32-NEXT: movl 8(%ebp), %eax699; SSE1_32-NEXT: movl 12(%ebp), %ecx700; SSE1_32-NEXT: movl %ecx, {{[0-9]+}}(%esp)701; SSE1_32-NEXT: movl %eax, (%esp)702; SSE1_32-NEXT: shrl $31, %ecx703; SSE1_32-NEXT: fildll (%esp)704; SSE1_32-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)705; SSE1_32-NEXT: fstpl {{[0-9]+}}(%esp)706; SSE1_32-NEXT: fldl {{[0-9]+}}(%esp)707; SSE1_32-NEXT: movl %ebp, %esp708; SSE1_32-NEXT: popl %ebp709; SSE1_32-NEXT: retl710;711; X87-LABEL: u64_to_d:712; X87: # %bb.0:713; X87-NEXT: pushl %ebp714; X87-NEXT: movl %esp, %ebp715; X87-NEXT: andl $-8, %esp716; X87-NEXT: subl $16, %esp717; X87-NEXT: movl 8(%ebp), %eax718; X87-NEXT: movl 12(%ebp), %ecx719; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)720; X87-NEXT: movl %eax, (%esp)721; X87-NEXT: shrl $31, %ecx722; X87-NEXT: fildll (%esp)723; X87-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)724; X87-NEXT: fstpl {{[0-9]+}}(%esp)725; X87-NEXT: fldl {{[0-9]+}}(%esp)726; X87-NEXT: movl %ebp, %esp727; X87-NEXT: popl %ebp728; X87-NEXT: retl729 %r = uitofp i64 %a to double730 ret double %r731}732 733define double @u64_to_d_optsize(i64 %a) nounwind optsize {734; AVX512DQVL_32-LABEL: u64_to_d_optsize:735; AVX512DQVL_32: # %bb.0:736; AVX512DQVL_32-NEXT: pushl %ebp737; AVX512DQVL_32-NEXT: movl %esp, %ebp738; AVX512DQVL_32-NEXT: andl $-8, %esp739; AVX512DQVL_32-NEXT: subl $8, %esp740; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero741; AVX512DQVL_32-NEXT: vcvtuqq2pd %ymm0, %ymm0742; AVX512DQVL_32-NEXT: vmovlps %xmm0, (%esp)743; AVX512DQVL_32-NEXT: fldl (%esp)744; AVX512DQVL_32-NEXT: movl %ebp, %esp745; AVX512DQVL_32-NEXT: popl %ebp746; AVX512DQVL_32-NEXT: vzeroupper747; AVX512DQVL_32-NEXT: retl748;749; AVX512_64-LABEL: u64_to_d_optsize:750; AVX512_64: # %bb.0:751; AVX512_64-NEXT: vcvtusi2sd %rdi, %xmm15, %xmm0752; AVX512_64-NEXT: retq753;754; AVX512DQ_32-LABEL: u64_to_d_optsize:755; AVX512DQ_32: # %bb.0:756; AVX512DQ_32-NEXT: pushl %ebp757; AVX512DQ_32-NEXT: movl %esp, %ebp758; AVX512DQ_32-NEXT: andl $-8, %esp759; AVX512DQ_32-NEXT: subl $8, %esp760; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero761; AVX512DQ_32-NEXT: vcvtuqq2pd %zmm0, %zmm0762; AVX512DQ_32-NEXT: vmovlps %xmm0, (%esp)763; AVX512DQ_32-NEXT: fldl (%esp)764; AVX512DQ_32-NEXT: movl %ebp, %esp765; AVX512DQ_32-NEXT: popl %ebp766; AVX512DQ_32-NEXT: vzeroupper767; AVX512DQ_32-NEXT: retl768;769; AVX512F_32-LABEL: u64_to_d_optsize:770; AVX512F_32: # %bb.0:771; AVX512F_32-NEXT: pushl %ebp772; AVX512F_32-NEXT: movl %esp, %ebp773; AVX512F_32-NEXT: andl $-8, %esp774; AVX512F_32-NEXT: subl $8, %esp775; AVX512F_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero776; AVX512F_32-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]777; AVX512F_32-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0778; AVX512F_32-NEXT: vhaddpd %xmm0, %xmm0, %xmm0779; AVX512F_32-NEXT: vmovlpd %xmm0, (%esp)780; AVX512F_32-NEXT: fldl (%esp)781; AVX512F_32-NEXT: movl %ebp, %esp782; AVX512F_32-NEXT: popl %ebp783; AVX512F_32-NEXT: retl784;785; SSE2_32-LABEL: u64_to_d_optsize:786; SSE2_32: # %bb.0:787; SSE2_32-NEXT: pushl %ebp788; SSE2_32-NEXT: movl %esp, %ebp789; SSE2_32-NEXT: andl $-8, %esp790; SSE2_32-NEXT: subl $8, %esp791; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero792; SSE2_32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]793; SSE2_32-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0794; SSE2_32-NEXT: movapd %xmm0, %xmm1795; SSE2_32-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]796; SSE2_32-NEXT: addsd %xmm0, %xmm1797; SSE2_32-NEXT: movsd %xmm1, (%esp)798; SSE2_32-NEXT: fldl (%esp)799; SSE2_32-NEXT: movl %ebp, %esp800; SSE2_32-NEXT: popl %ebp801; SSE2_32-NEXT: retl802;803; SSE2_64-LABEL: u64_to_d_optsize:804; SSE2_64: # %bb.0:805; SSE2_64-NEXT: movq %rdi, %xmm1806; SSE2_64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]807; SSE2_64-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1808; SSE2_64-NEXT: movapd %xmm1, %xmm0809; SSE2_64-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]810; SSE2_64-NEXT: addsd %xmm1, %xmm0811; SSE2_64-NEXT: retq812;813; SSE1_32-LABEL: u64_to_d_optsize:814; SSE1_32: # %bb.0:815; SSE1_32-NEXT: pushl %ebp816; SSE1_32-NEXT: movl %esp, %ebp817; SSE1_32-NEXT: andl $-8, %esp818; SSE1_32-NEXT: subl $16, %esp819; SSE1_32-NEXT: movl 8(%ebp), %eax820; SSE1_32-NEXT: movl 12(%ebp), %ecx821; SSE1_32-NEXT: movl %ecx, {{[0-9]+}}(%esp)822; SSE1_32-NEXT: movl %eax, (%esp)823; SSE1_32-NEXT: shrl $31, %ecx824; SSE1_32-NEXT: fildll (%esp)825; SSE1_32-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)826; SSE1_32-NEXT: fstpl {{[0-9]+}}(%esp)827; SSE1_32-NEXT: fldl {{[0-9]+}}(%esp)828; SSE1_32-NEXT: movl %ebp, %esp829; SSE1_32-NEXT: popl %ebp830; SSE1_32-NEXT: retl831;832; X87-LABEL: u64_to_d_optsize:833; X87: # %bb.0:834; X87-NEXT: pushl %ebp835; X87-NEXT: movl %esp, %ebp836; X87-NEXT: andl $-8, %esp837; X87-NEXT: subl $16, %esp838; X87-NEXT: movl 8(%ebp), %eax839; X87-NEXT: movl 12(%ebp), %ecx840; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)841; X87-NEXT: movl %eax, (%esp)842; X87-NEXT: shrl $31, %ecx843; X87-NEXT: fildll (%esp)844; X87-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)845; X87-NEXT: fstpl {{[0-9]+}}(%esp)846; X87-NEXT: fldl {{[0-9]+}}(%esp)847; X87-NEXT: movl %ebp, %esp848; X87-NEXT: popl %ebp849; X87-NEXT: retl850 %r = uitofp i64 %a to double851 ret double %r852}853 854define double @s64_to_d(i64 %a) nounwind {855; AVX512DQVL_32-LABEL: s64_to_d:856; AVX512DQVL_32: # %bb.0:857; AVX512DQVL_32-NEXT: pushl %ebp858; AVX512DQVL_32-NEXT: movl %esp, %ebp859; AVX512DQVL_32-NEXT: andl $-8, %esp860; AVX512DQVL_32-NEXT: subl $8, %esp861; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero862; AVX512DQVL_32-NEXT: vcvtqq2pd %ymm0, %ymm0863; AVX512DQVL_32-NEXT: vmovlps %xmm0, (%esp)864; AVX512DQVL_32-NEXT: fldl (%esp)865; AVX512DQVL_32-NEXT: movl %ebp, %esp866; AVX512DQVL_32-NEXT: popl %ebp867; AVX512DQVL_32-NEXT: vzeroupper868; AVX512DQVL_32-NEXT: retl869;870; AVX512_64-LABEL: s64_to_d:871; AVX512_64: # %bb.0:872; AVX512_64-NEXT: vcvtsi2sd %rdi, %xmm15, %xmm0873; AVX512_64-NEXT: retq874;875; AVX512DQ_32-LABEL: s64_to_d:876; AVX512DQ_32: # %bb.0:877; AVX512DQ_32-NEXT: pushl %ebp878; AVX512DQ_32-NEXT: movl %esp, %ebp879; AVX512DQ_32-NEXT: andl $-8, %esp880; AVX512DQ_32-NEXT: subl $8, %esp881; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero882; AVX512DQ_32-NEXT: vcvtqq2pd %zmm0, %zmm0883; AVX512DQ_32-NEXT: vmovlps %xmm0, (%esp)884; AVX512DQ_32-NEXT: fldl (%esp)885; AVX512DQ_32-NEXT: movl %ebp, %esp886; AVX512DQ_32-NEXT: popl %ebp887; AVX512DQ_32-NEXT: vzeroupper888; AVX512DQ_32-NEXT: retl889;890; AVX512F_32-LABEL: s64_to_d:891; AVX512F_32: # %bb.0:892; AVX512F_32-NEXT: pushl %ebp893; AVX512F_32-NEXT: movl %esp, %ebp894; AVX512F_32-NEXT: andl $-8, %esp895; AVX512F_32-NEXT: subl $8, %esp896; AVX512F_32-NEXT: fildll 8(%ebp)897; AVX512F_32-NEXT: fstpl (%esp)898; AVX512F_32-NEXT: fldl (%esp)899; AVX512F_32-NEXT: movl %ebp, %esp900; AVX512F_32-NEXT: popl %ebp901; AVX512F_32-NEXT: retl902;903; SSE2_32-LABEL: s64_to_d:904; SSE2_32: # %bb.0:905; SSE2_32-NEXT: pushl %ebp906; SSE2_32-NEXT: movl %esp, %ebp907; SSE2_32-NEXT: andl $-8, %esp908; SSE2_32-NEXT: subl $8, %esp909; SSE2_32-NEXT: fildll 8(%ebp)910; SSE2_32-NEXT: fstpl (%esp)911; SSE2_32-NEXT: fldl (%esp)912; SSE2_32-NEXT: movl %ebp, %esp913; SSE2_32-NEXT: popl %ebp914; SSE2_32-NEXT: retl915;916; SSE2_64-LABEL: s64_to_d:917; SSE2_64: # %bb.0:918; SSE2_64-NEXT: cvtsi2sd %rdi, %xmm0919; SSE2_64-NEXT: retq920;921; SSE1_32-LABEL: s64_to_d:922; SSE1_32: # %bb.0:923; SSE1_32-NEXT: fildll {{[0-9]+}}(%esp)924; SSE1_32-NEXT: retl925;926; X87-LABEL: s64_to_d:927; X87: # %bb.0:928; X87-NEXT: fildll {{[0-9]+}}(%esp)929; X87-NEXT: retl930 %r = sitofp i64 %a to double931 ret double %r932}933 934define double @s64_to_d_2(i64 %a) nounwind {935; AVX512DQVL_32-LABEL: s64_to_d_2:936; AVX512DQVL_32: # %bb.0:937; AVX512DQVL_32-NEXT: pushl %ebp938; AVX512DQVL_32-NEXT: movl %esp, %ebp939; AVX512DQVL_32-NEXT: andl $-8, %esp940; AVX512DQVL_32-NEXT: subl $8, %esp941; AVX512DQVL_32-NEXT: movl 8(%ebp), %eax942; AVX512DQVL_32-NEXT: movl 12(%ebp), %ecx943; AVX512DQVL_32-NEXT: addl $5, %eax944; AVX512DQVL_32-NEXT: adcl $0, %ecx945; AVX512DQVL_32-NEXT: vmovd %eax, %xmm0946; AVX512DQVL_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0947; AVX512DQVL_32-NEXT: vcvtqq2pd %ymm0, %ymm0948; AVX512DQVL_32-NEXT: vmovlps %xmm0, (%esp)949; AVX512DQVL_32-NEXT: fldl (%esp)950; AVX512DQVL_32-NEXT: movl %ebp, %esp951; AVX512DQVL_32-NEXT: popl %ebp952; AVX512DQVL_32-NEXT: vzeroupper953; AVX512DQVL_32-NEXT: retl954;955; AVX512_64-LABEL: s64_to_d_2:956; AVX512_64: # %bb.0:957; AVX512_64-NEXT: addq $5, %rdi958; AVX512_64-NEXT: vcvtsi2sd %rdi, %xmm15, %xmm0959; AVX512_64-NEXT: retq960;961; AVX512DQ_32-LABEL: s64_to_d_2:962; AVX512DQ_32: # %bb.0:963; AVX512DQ_32-NEXT: pushl %ebp964; AVX512DQ_32-NEXT: movl %esp, %ebp965; AVX512DQ_32-NEXT: andl $-8, %esp966; AVX512DQ_32-NEXT: subl $8, %esp967; AVX512DQ_32-NEXT: movl 8(%ebp), %eax968; AVX512DQ_32-NEXT: movl 12(%ebp), %ecx969; AVX512DQ_32-NEXT: addl $5, %eax970; AVX512DQ_32-NEXT: adcl $0, %ecx971; AVX512DQ_32-NEXT: vmovd %eax, %xmm0972; AVX512DQ_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0973; AVX512DQ_32-NEXT: vcvtqq2pd %zmm0, %zmm0974; AVX512DQ_32-NEXT: vmovlps %xmm0, (%esp)975; AVX512DQ_32-NEXT: fldl (%esp)976; AVX512DQ_32-NEXT: movl %ebp, %esp977; AVX512DQ_32-NEXT: popl %ebp978; AVX512DQ_32-NEXT: vzeroupper979; AVX512DQ_32-NEXT: retl980;981; AVX512F_32-LABEL: s64_to_d_2:982; AVX512F_32: # %bb.0:983; AVX512F_32-NEXT: pushl %ebp984; AVX512F_32-NEXT: movl %esp, %ebp985; AVX512F_32-NEXT: andl $-8, %esp986; AVX512F_32-NEXT: subl $16, %esp987; AVX512F_32-NEXT: movl 8(%ebp), %eax988; AVX512F_32-NEXT: movl 12(%ebp), %ecx989; AVX512F_32-NEXT: addl $5, %eax990; AVX512F_32-NEXT: adcl $0, %ecx991; AVX512F_32-NEXT: vmovd %eax, %xmm0992; AVX512F_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0993; AVX512F_32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)994; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)995; AVX512F_32-NEXT: fstpl (%esp)996; AVX512F_32-NEXT: fldl (%esp)997; AVX512F_32-NEXT: movl %ebp, %esp998; AVX512F_32-NEXT: popl %ebp999; AVX512F_32-NEXT: retl1000;1001; SSE2_32-LABEL: s64_to_d_2:1002; SSE2_32: # %bb.0:1003; SSE2_32-NEXT: pushl %ebp1004; SSE2_32-NEXT: movl %esp, %ebp1005; SSE2_32-NEXT: andl $-8, %esp1006; SSE2_32-NEXT: subl $16, %esp1007; SSE2_32-NEXT: movl 8(%ebp), %eax1008; SSE2_32-NEXT: movl 12(%ebp), %ecx1009; SSE2_32-NEXT: addl $5, %eax1010; SSE2_32-NEXT: adcl $0, %ecx1011; SSE2_32-NEXT: movd %ecx, %xmm01012; SSE2_32-NEXT: movd %eax, %xmm11013; SSE2_32-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]1014; SSE2_32-NEXT: movq %xmm1, {{[0-9]+}}(%esp)1015; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)1016; SSE2_32-NEXT: fstpl (%esp)1017; SSE2_32-NEXT: fldl (%esp)1018; SSE2_32-NEXT: movl %ebp, %esp1019; SSE2_32-NEXT: popl %ebp1020; SSE2_32-NEXT: retl1021;1022; SSE2_64-LABEL: s64_to_d_2:1023; SSE2_64: # %bb.0:1024; SSE2_64-NEXT: addq $5, %rdi1025; SSE2_64-NEXT: cvtsi2sd %rdi, %xmm01026; SSE2_64-NEXT: retq1027;1028; SSE1_32-LABEL: s64_to_d_2:1029; SSE1_32: # %bb.0:1030; SSE1_32-NEXT: pushl %ebp1031; SSE1_32-NEXT: movl %esp, %ebp1032; SSE1_32-NEXT: andl $-8, %esp1033; SSE1_32-NEXT: subl $8, %esp1034; SSE1_32-NEXT: movl 8(%ebp), %eax1035; SSE1_32-NEXT: movl 12(%ebp), %ecx1036; SSE1_32-NEXT: addl $5, %eax1037; SSE1_32-NEXT: adcl $0, %ecx1038; SSE1_32-NEXT: movl %eax, (%esp)1039; SSE1_32-NEXT: movl %ecx, {{[0-9]+}}(%esp)1040; SSE1_32-NEXT: fildll (%esp)1041; SSE1_32-NEXT: movl %ebp, %esp1042; SSE1_32-NEXT: popl %ebp1043; SSE1_32-NEXT: retl1044;1045; X87-LABEL: s64_to_d_2:1046; X87: # %bb.0:1047; X87-NEXT: pushl %ebp1048; X87-NEXT: movl %esp, %ebp1049; X87-NEXT: andl $-8, %esp1050; X87-NEXT: subl $8, %esp1051; X87-NEXT: movl 8(%ebp), %eax1052; X87-NEXT: movl 12(%ebp), %ecx1053; X87-NEXT: addl $5, %eax1054; X87-NEXT: adcl $0, %ecx1055; X87-NEXT: movl %eax, (%esp)1056; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)1057; X87-NEXT: fildll (%esp)1058; X87-NEXT: movl %ebp, %esp1059; X87-NEXT: popl %ebp1060; X87-NEXT: retl1061 %b = add i64 %a, 51062 %f = sitofp i64 %b to double1063 ret double %f1064}1065 1066define x86_fp80 @u64_to_x(i64 %a) nounwind {1067; CHECK32-LABEL: u64_to_x:1068; CHECK32: # %bb.0:1069; CHECK32-NEXT: pushl %ebp1070; CHECK32-NEXT: movl %esp, %ebp1071; CHECK32-NEXT: andl $-8, %esp1072; CHECK32-NEXT: subl $8, %esp1073; CHECK32-NEXT: movl 8(%ebp), %eax1074; CHECK32-NEXT: movl 12(%ebp), %ecx1075; CHECK32-NEXT: movl %ecx, {{[0-9]+}}(%esp)1076; CHECK32-NEXT: movl %eax, (%esp)1077; CHECK32-NEXT: shrl $31, %ecx1078; CHECK32-NEXT: fildll (%esp)1079; CHECK32-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)1080; CHECK32-NEXT: movl %ebp, %esp1081; CHECK32-NEXT: popl %ebp1082; CHECK32-NEXT: retl1083;1084; CHECK64-LABEL: u64_to_x:1085; CHECK64: # %bb.0:1086; CHECK64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)1087; CHECK64-NEXT: xorl %eax, %eax1088; CHECK64-NEXT: testq %rdi, %rdi1089; CHECK64-NEXT: sets %al1090; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)1091; CHECK64-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}(,%rax,4)1092; CHECK64-NEXT: retq1093 %r = uitofp i64 %a to x86_fp801094 ret x86_fp80 %r1095}1096 1097define x86_fp80 @s64_to_x(i64 %a) nounwind {1098; CHECK32-LABEL: s64_to_x:1099; CHECK32: # %bb.0:1100; CHECK32-NEXT: fildll {{[0-9]+}}(%esp)1101; CHECK32-NEXT: retl1102;1103; CHECK64-LABEL: s64_to_x:1104; CHECK64: # %bb.0:1105; CHECK64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)1106; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)1107; CHECK64-NEXT: retq1108 %r = sitofp i64 %a to x86_fp801109 ret x86_fp80 %r1110}1111