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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s3 4define i8 @isnonneg_i8(i8 %x) {5; CHECK-LABEL: isnonneg_i8:6; CHECK: # %bb.0:7; CHECK-NEXT: movl %edi, %eax8; CHECK-NEXT: sarb $7, %al9; CHECK-NEXT: orb $42, %al10; CHECK-NEXT: # kill: def $al killed $al killed $eax11; CHECK-NEXT: retq12 %cond = icmp sgt i8 %x, -113 %r = select i1 %cond, i8 42, i8 -114 ret i8 %r15}16 17define i16 @isnonneg_i16(i16 %x) {18; CHECK-LABEL: isnonneg_i16:19; CHECK: # %bb.0:20; CHECK-NEXT: movswl %di, %eax21; CHECK-NEXT: sarl $15, %eax22; CHECK-NEXT: orl $542, %eax # imm = 0x21E23; CHECK-NEXT: # kill: def $ax killed $ax killed $eax24; CHECK-NEXT: retq25 %cond = icmp sgt i16 %x, -126 %r = select i1 %cond, i16 542, i16 -127 ret i16 %r28}29 30define i32 @isnonneg_i32(i32 %x) {31; CHECK-LABEL: isnonneg_i32:32; CHECK: # %bb.0:33; CHECK-NEXT: movl %edi, %eax34; CHECK-NEXT: sarl $31, %eax35; CHECK-NEXT: orl $-42, %eax36; CHECK-NEXT: retq37 %cond = icmp sgt i32 %x, -138 %r = select i1 %cond, i32 -42, i32 -139 ret i32 %r40}41 42define i64 @isnonneg_i64(i64 %x) {43; CHECK-LABEL: isnonneg_i64:44; CHECK: # %bb.0:45; CHECK-NEXT: movq %rdi, %rax46; CHECK-NEXT: sarq $63, %rax47; CHECK-NEXT: orq $2342342, %rax # imm = 0x23BDC648; CHECK-NEXT: retq49 %cond = icmp sgt i64 %x, -150 %r = select i1 %cond, i64 2342342, i64 -151 ret i64 %r52}53 54define <16 x i8> @isnonneg_v16i8(<16 x i8> %x) {55; CHECK-LABEL: isnonneg_v16i8:56; CHECK: # %bb.0:57; CHECK-NEXT: pxor %xmm1, %xmm158; CHECK-NEXT: pcmpgtb %xmm0, %xmm159; CHECK-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm160; CHECK-NEXT: movdqa %xmm1, %xmm061; CHECK-NEXT: retq62 %cond = icmp sgt <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>63 %r = select <16 x i1> %cond, <16 x i8> <i8 12, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>64 ret <16 x i8> %r65}66 67define <8 x i16> @isnonneg_v8i16(<8 x i16> %x) {68; CHECK-LABEL: isnonneg_v8i16:69; CHECK: # %bb.0:70; CHECK-NEXT: psraw $15, %xmm071; CHECK-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm072; CHECK-NEXT: retq73 %cond = icmp sgt <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>74 %r = select <8 x i1> %cond, <8 x i16> <i16 1, i16 542, i16 542, i16 542, i16 542, i16 542, i16 542, i16 1>, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>75 ret <8 x i16> %r76}77 78define <4 x i32> @isnonneg_v4i32(<4 x i32> %x) {79; CHECK-LABEL: isnonneg_v4i32:80; CHECK: # %bb.0:81; CHECK-NEXT: psrad $31, %xmm082; CHECK-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm083; CHECK-NEXT: retq84 %cond = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>85 %r = select <4 x i1> %cond, <4 x i32> <i32 0, i32 42, i32 -42, i32 1>, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>86 ret <4 x i32> %r87}88 89define <2 x i64> @isnonneg_v2i64(<2 x i64> %x) {90; CHECK-LABEL: isnonneg_v2i64:91; CHECK: # %bb.0:92; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]93; CHECK-NEXT: psrad $31, %xmm094; CHECK-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm095; CHECK-NEXT: retq96 %cond = icmp sgt <2 x i64> %x, <i64 -1, i64 -1>97 %r = select <2 x i1> %cond, <2 x i64> <i64 2342342, i64 12>, <2 x i64> <i64 -1, i64 -1>98 ret <2 x i64> %r99}100 101define i8 @isneg_i8(i8 %x) {102; CHECK-LABEL: isneg_i8:103; CHECK: # %bb.0:104; CHECK-NEXT: movl %edi, %eax105; CHECK-NEXT: sarb $7, %al106; CHECK-NEXT: andb $42, %al107; CHECK-NEXT: # kill: def $al killed $al killed $eax108; CHECK-NEXT: retq109 %cond = icmp slt i8 %x, 0110 %r = select i1 %cond, i8 42, i8 0111 ret i8 %r112}113 114define i16 @isneg_i16(i16 %x) {115; CHECK-LABEL: isneg_i16:116; CHECK: # %bb.0:117; CHECK-NEXT: movswl %di, %eax118; CHECK-NEXT: shrl $15, %eax119; CHECK-NEXT: andl $542, %eax # imm = 0x21E120; CHECK-NEXT: # kill: def $ax killed $ax killed $eax121; CHECK-NEXT: retq122 %cond = icmp slt i16 %x, 0123 %r = select i1 %cond, i16 542, i16 0124 ret i16 %r125}126 127define i32 @isneg_i32(i32 %x) {128; CHECK-LABEL: isneg_i32:129; CHECK: # %bb.0:130; CHECK-NEXT: movl %edi, %eax131; CHECK-NEXT: sarl $31, %eax132; CHECK-NEXT: andl $-42, %eax133; CHECK-NEXT: retq134 %cond = icmp slt i32 %x, 0135 %r = select i1 %cond, i32 -42, i32 0136 ret i32 %r137}138 139define i64 @isneg_i64(i64 %x) {140; CHECK-LABEL: isneg_i64:141; CHECK: # %bb.0:142; CHECK-NEXT: movq %rdi, %rax143; CHECK-NEXT: sarq $63, %rax144; CHECK-NEXT: andl $2342342, %eax # imm = 0x23BDC6145; CHECK-NEXT: retq146 %cond = icmp slt i64 %x, 0147 %r = select i1 %cond, i64 2342342, i64 0148 ret i64 %r149}150 151define <16 x i8> @isneg_v16i8(<16 x i8> %x) {152; CHECK-LABEL: isneg_v16i8:153; CHECK: # %bb.0:154; CHECK-NEXT: pxor %xmm1, %xmm1155; CHECK-NEXT: pcmpgtb %xmm0, %xmm1156; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1157; CHECK-NEXT: movdqa %xmm1, %xmm0158; CHECK-NEXT: retq159 %cond = icmp slt <16 x i8> %x, zeroinitializer160 %r = select <16 x i1> %cond, <16 x i8> <i8 12, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>, <16 x i8> zeroinitializer161 ret <16 x i8> %r162}163 164define <8 x i16> @isneg_v8i16(<8 x i16> %x) {165; CHECK-LABEL: isneg_v8i16:166; CHECK: # %bb.0:167; CHECK-NEXT: psraw $15, %xmm0168; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0169; CHECK-NEXT: retq170 %cond = icmp slt <8 x i16> %x, zeroinitializer171 %r = select <8 x i1> %cond, <8 x i16> <i16 1, i16 542, i16 542, i16 542, i16 542, i16 542, i16 542, i16 1>, <8 x i16> zeroinitializer172 ret <8 x i16> %r173}174 175define <4 x i32> @isneg_v4i32(<4 x i32> %x) {176; CHECK-LABEL: isneg_v4i32:177; CHECK: # %bb.0:178; CHECK-NEXT: psrad $31, %xmm0179; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0180; CHECK-NEXT: retq181 %cond = icmp slt <4 x i32> %x, zeroinitializer182 %r = select <4 x i1> %cond, <4 x i32> <i32 0, i32 42, i32 -42, i32 1>, <4 x i32> zeroinitializer183 ret <4 x i32> %r184}185 186define <2 x i64> @isneg_v2i64(<2 x i64> %x) {187; CHECK-LABEL: isneg_v2i64:188; CHECK: # %bb.0:189; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]190; CHECK-NEXT: psrad $31, %xmm0191; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0192; CHECK-NEXT: retq193 %cond = icmp slt <2 x i64> %x, zeroinitializer194 %r = select <2 x i1> %cond, <2 x i64> <i64 2342342, i64 12>, <2 x i64> zeroinitializer195 ret <2 x i64> %r196}197