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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefixes=CHECK,SSE23; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s --check-prefixes=CHECK,SSE414 5define i32 @test_eq_1(<4 x i32> %A, <4 x i32> %B) {6; SSE2-LABEL: test_eq_1:7; SSE2: # %bb.0:8; SSE2-NEXT: pcmpgtd %xmm0, %xmm19; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]10; SSE2-NEXT: movd %xmm0, %eax11; SSE2-NEXT: notl %eax12; SSE2-NEXT: retq13;14; SSE41-LABEL: test_eq_1:15; SSE41: # %bb.0:16; SSE41-NEXT: pcmpgtd %xmm0, %xmm117; SSE41-NEXT: pextrd $1, %xmm1, %eax18; SSE41-NEXT: notl %eax19; SSE41-NEXT: retq20 %cmp = icmp slt <4 x i32> %A, %B21 %sext = sext <4 x i1> %cmp to <4 x i32>22 %cmp1 = icmp eq <4 x i32> %sext, zeroinitializer23 %t0 = extractelement <4 x i1> %cmp1, i32 124 %t1 = sext i1 %t0 to i3225 ret i32 %t126}27 28define i32 @test_ne_1(<4 x i32> %A, <4 x i32> %B) {29; SSE2-LABEL: test_ne_1:30; SSE2: # %bb.0:31; SSE2-NEXT: pcmpgtd %xmm0, %xmm132; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]33; SSE2-NEXT: movd %xmm0, %eax34; SSE2-NEXT: retq35;36; SSE41-LABEL: test_ne_1:37; SSE41: # %bb.0:38; SSE41-NEXT: pcmpgtd %xmm0, %xmm139; SSE41-NEXT: pextrd $1, %xmm1, %eax40; SSE41-NEXT: retq41 %cmp = icmp slt <4 x i32> %A, %B42 %sext = sext <4 x i1> %cmp to <4 x i32>43 %cmp1 = icmp ne <4 x i32> %sext, zeroinitializer44 %t0 = extractelement <4 x i1> %cmp1, i32 145 %t1 = sext i1 %t0 to i3246 ret i32 %t147}48 49define i32 @test_le_1(<4 x i32> %A, <4 x i32> %B) {50; CHECK-LABEL: test_le_1:51; CHECK: # %bb.0:52; CHECK-NEXT: movl $-1, %eax53; CHECK-NEXT: retq54 %cmp = icmp slt <4 x i32> %A, %B55 %sext = sext <4 x i1> %cmp to <4 x i32>56 %cmp1 = icmp sle <4 x i32> %sext, zeroinitializer57 %t0 = extractelement <4 x i1> %cmp1, i32 158 %t1 = sext i1 %t0 to i3259 ret i32 %t160}61 62define i32 @test_ge_1(<4 x i32> %A, <4 x i32> %B) {63; SSE2-LABEL: test_ge_1:64; SSE2: # %bb.0:65; SSE2-NEXT: pcmpgtd %xmm0, %xmm166; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]67; SSE2-NEXT: movd %xmm0, %eax68; SSE2-NEXT: notl %eax69; SSE2-NEXT: retq70;71; SSE41-LABEL: test_ge_1:72; SSE41: # %bb.0:73; SSE41-NEXT: pcmpgtd %xmm0, %xmm174; SSE41-NEXT: pextrd $1, %xmm1, %eax75; SSE41-NEXT: notl %eax76; SSE41-NEXT: retq77 %cmp = icmp slt <4 x i32> %A, %B78 %sext = sext <4 x i1> %cmp to <4 x i32>79 %cmp1 = icmp sge <4 x i32> %sext, zeroinitializer80 %t0 = extractelement <4 x i1> %cmp1, i32 181 %t1 = sext i1 %t0 to i3282 ret i32 %t183}84 85define i32 @test_lt_1(<4 x i32> %A, <4 x i32> %B) {86; SSE2-LABEL: test_lt_1:87; SSE2: # %bb.0:88; SSE2-NEXT: pcmpgtd %xmm0, %xmm189; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]90; SSE2-NEXT: movd %xmm0, %eax91; SSE2-NEXT: retq92;93; SSE41-LABEL: test_lt_1:94; SSE41: # %bb.0:95; SSE41-NEXT: pcmpgtd %xmm0, %xmm196; SSE41-NEXT: pextrd $1, %xmm1, %eax97; SSE41-NEXT: retq98 %cmp = icmp slt <4 x i32> %A, %B99 %sext = sext <4 x i1> %cmp to <4 x i32>100 %cmp1 = icmp slt <4 x i32> %sext, zeroinitializer101 %t0 = extractelement <4 x i1> %cmp, i32 1102 %t1 = sext i1 %t0 to i32103 ret i32 %t1104}105 106define i32 @test_gt_1(<4 x i32> %A, <4 x i32> %B) {107; CHECK-LABEL: test_gt_1:108; CHECK: # %bb.0:109; CHECK-NEXT: xorl %eax, %eax110; CHECK-NEXT: retq111 %cmp = icmp slt <4 x i32> %A, %B112 %sext = sext <4 x i1> %cmp to <4 x i32>113 %cmp1 = icmp sgt <4 x i32> %sext, zeroinitializer114 %t0 = extractelement <4 x i1> %cmp1, i32 1115 %t1 = sext i1 %t0 to i32116 ret i32 %t1117}118 119define i32 @test_eq_2(<4 x i32> %A, <4 x i32> %B) {120; SSE2-LABEL: test_eq_2:121; SSE2: # %bb.0:122; SSE2-NEXT: pcmpgtd %xmm1, %xmm0123; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]124; SSE2-NEXT: movd %xmm0, %eax125; SSE2-NEXT: notl %eax126; SSE2-NEXT: retq127;128; SSE41-LABEL: test_eq_2:129; SSE41: # %bb.0:130; SSE41-NEXT: pcmpgtd %xmm1, %xmm0131; SSE41-NEXT: pextrd $1, %xmm0, %eax132; SSE41-NEXT: notl %eax133; SSE41-NEXT: retq134 %cmp = icmp slt <4 x i32> %B, %A135 %sext = sext <4 x i1> %cmp to <4 x i32>136 %cmp1 = icmp eq <4 x i32> %sext, zeroinitializer137 %t0 = extractelement <4 x i1> %cmp1, i32 1138 %t1 = sext i1 %t0 to i32139 ret i32 %t1140}141 142define i32 @test_ne_2(<4 x i32> %A, <4 x i32> %B) {143; SSE2-LABEL: test_ne_2:144; SSE2: # %bb.0:145; SSE2-NEXT: pcmpgtd %xmm1, %xmm0146; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]147; SSE2-NEXT: movd %xmm0, %eax148; SSE2-NEXT: retq149;150; SSE41-LABEL: test_ne_2:151; SSE41: # %bb.0:152; SSE41-NEXT: pcmpgtd %xmm1, %xmm0153; SSE41-NEXT: pextrd $1, %xmm0, %eax154; SSE41-NEXT: retq155 %cmp = icmp slt <4 x i32> %B, %A156 %sext = sext <4 x i1> %cmp to <4 x i32>157 %cmp1 = icmp ne <4 x i32> %sext, zeroinitializer158 %t0 = extractelement <4 x i1> %cmp1, i32 1159 %t1 = sext i1 %t0 to i32160 ret i32 %t1161}162 163define i32 @test_le_2(<4 x i32> %A, <4 x i32> %B) {164; SSE2-LABEL: test_le_2:165; SSE2: # %bb.0:166; SSE2-NEXT: pcmpgtd %xmm1, %xmm0167; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]168; SSE2-NEXT: movd %xmm0, %eax169; SSE2-NEXT: notl %eax170; SSE2-NEXT: retq171;172; SSE41-LABEL: test_le_2:173; SSE41: # %bb.0:174; SSE41-NEXT: pcmpgtd %xmm1, %xmm0175; SSE41-NEXT: pextrd $1, %xmm0, %eax176; SSE41-NEXT: notl %eax177; SSE41-NEXT: retq178 %cmp = icmp slt <4 x i32> %B, %A179 %sext = sext <4 x i1> %cmp to <4 x i32>180 %cmp1 = icmp sle <4 x i32> zeroinitializer, %sext181 %t0 = extractelement <4 x i1> %cmp1, i32 1182 %t1 = sext i1 %t0 to i32183 ret i32 %t1184}185 186define i32 @test_ge_2(<4 x i32> %A, <4 x i32> %B) {187; CHECK-LABEL: test_ge_2:188; CHECK: # %bb.0:189; CHECK-NEXT: movl $-1, %eax190; CHECK-NEXT: retq191 %cmp = icmp slt <4 x i32> %B, %A192 %sext = sext <4 x i1> %cmp to <4 x i32>193 %cmp1 = icmp sge <4 x i32> zeroinitializer, %sext194 %t0 = extractelement <4 x i1> %cmp1, i32 1195 %t1 = sext i1 %t0 to i32196 ret i32 %t1197}198 199define i32 @test_lt_2(<4 x i32> %A, <4 x i32> %B) {200; SSE2-LABEL: test_lt_2:201; SSE2: # %bb.0:202; SSE2-NEXT: pcmpgtd %xmm1, %xmm0203; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]204; SSE2-NEXT: movd %xmm0, %eax205; SSE2-NEXT: retq206;207; SSE41-LABEL: test_lt_2:208; SSE41: # %bb.0:209; SSE41-NEXT: pcmpgtd %xmm1, %xmm0210; SSE41-NEXT: pextrd $1, %xmm0, %eax211; SSE41-NEXT: retq212 %cmp = icmp slt <4 x i32> %B, %A213 %sext = sext <4 x i1> %cmp to <4 x i32>214 %cmp1 = icmp slt <4 x i32> zeroinitializer, %sext215 %t0 = extractelement <4 x i1> %cmp, i32 1216 %t1 = sext i1 %t0 to i32217 ret i32 %t1218}219 220define i32 @test_gt_2(<4 x i32> %A, <4 x i32> %B) {221; SSE2-LABEL: test_gt_2:222; SSE2: # %bb.0:223; SSE2-NEXT: pcmpgtd %xmm1, %xmm0224; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]225; SSE2-NEXT: movd %xmm0, %eax226; SSE2-NEXT: retq227;228; SSE41-LABEL: test_gt_2:229; SSE41: # %bb.0:230; SSE41-NEXT: pcmpgtd %xmm1, %xmm0231; SSE41-NEXT: pextrd $1, %xmm0, %eax232; SSE41-NEXT: retq233 %cmp = icmp slt <4 x i32> %B, %A234 %sext = sext <4 x i1> %cmp to <4 x i32>235 %cmp1 = icmp sgt <4 x i32> zeroinitializer, %sext236 %t0 = extractelement <4 x i1> %cmp1, i32 1237 %t1 = sext i1 %t0 to i32238 ret i32 %t1239}240 241; (and (setne X, 0), (setne X, -1)) --> (setuge (add X, 1), 2)242; Don't combine with i1 - out of range constant243define void @test_i1_uge(ptr%A2) {244; CHECK-LABEL: test_i1_uge:245; CHECK: # %bb.0:246; CHECK-NEXT: movzbl (%rdi), %eax247; CHECK-NEXT: notb %al248; CHECK-NEXT: andb $1, %al249; CHECK-NEXT: movb %al, (%rdi)250; CHECK-NEXT: retq251 %L5 = load i1, ptr %A2252 %C3 = icmp ne i1 %L5, true253 %C8 = icmp eq i1 %L5, false254 %C9 = icmp ugt i1 %C3, %C8255 %G3 = getelementptr i1, ptr %A2, i1 %C9256 store i1 %C3, ptr %G3257 ret void258}259 260; This should not get folded to 0.261 262define i64 @PR40657(i8 %var2, i8 %var9) {263; CHECK-LABEL: PR40657:264; CHECK: # %bb.0:265; CHECK-NEXT: xorl %esi, %edi266; CHECK-NEXT: notb %dil267; CHECK-NEXT: movzbl %dil, %eax268; CHECK-NEXT: andl $1, %eax269; CHECK-NEXT: retq270 %var6 = trunc i8 %var9 to i1271 %var7 = trunc i8 175 to i1272 %var3 = sub nsw i1 %var6, %var7273 %var4 = icmp eq i64 1114591064, 1114591064274 %var1 = udiv i1 %var3, %var4275 %var0 = trunc i8 %var2 to i1276 %res = sub nsw nuw i1 %var0, %var1277 %res.cast = zext i1 %res to i64278 ret i64 %res.cast279}280 281; This should not get folded to 0.282 283define i64 @PR40657_commute(i8 %var7, i8 %var8, i8 %var9) {284; CHECK-LABEL: PR40657_commute:285; CHECK: # %bb.0:286; CHECK-NEXT: movl %edx, %eax287; CHECK-NEXT: andl $1, %eax288; CHECK-NEXT: retq289 %var4 = trunc i8 %var9 to i1290 %var5 = trunc i8 %var8 to i1291 %var6 = trunc i8 %var7 to i1292 %var3 = sub nsw nuw i1 %var5, %var6293 %var0 = sub nuw i1 %var4, %var3294 %var2 = sub i1 %var3, %var0295 %var1 = icmp ne i1 %var0, %var2296 %res = sub nsw nuw i1 %var0, %var1297 %res.cast = zext i1 %res to i64298 ret i64 %res.cast299}300 301define i64 @sub_to_shift_to_add(i32 %x, i32 %y, i64 %s1, i64 %s2) {302; CHECK-LABEL: sub_to_shift_to_add:303; CHECK: # %bb.0:304; CHECK-NEXT: movq %rdx, %rax305; CHECK-NEXT: addl %esi, %esi306; CHECK-NEXT: cmpl %esi, %edi307; CHECK-NEXT: cmovneq %rcx, %rax308; CHECK-NEXT: retq309 %sub = sub i32 %x, %y310 %cmp = icmp eq i32 %sub, %y311 %r = select i1 %cmp, i64 %s1, i64 %s2312 ret i64 %r313}314 315define <4 x float> @sub_to_shift_to_add_vec(<4 x i32> %x, <4 x i32> %y, <4 x float> %s1, <4 x float> %s2) {316; SSE2-LABEL: sub_to_shift_to_add_vec:317; SSE2: # %bb.0:318; SSE2-NEXT: paddd %xmm1, %xmm1319; SSE2-NEXT: pcmpeqd %xmm1, %xmm0320; SSE2-NEXT: pand %xmm0, %xmm2321; SSE2-NEXT: pandn %xmm3, %xmm0322; SSE2-NEXT: por %xmm2, %xmm0323; SSE2-NEXT: retq324;325; SSE41-LABEL: sub_to_shift_to_add_vec:326; SSE41: # %bb.0:327; SSE41-NEXT: paddd %xmm1, %xmm1328; SSE41-NEXT: pcmpeqd %xmm1, %xmm0329; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm3330; SSE41-NEXT: movaps %xmm3, %xmm0331; SSE41-NEXT: retq332 %sub = sub <4 x i32> %x, %y333 %cmp = icmp eq <4 x i32> %sub, %y334 %r = select <4 x i1> %cmp, <4 x float> %s1, <4 x float> %s2335 ret <4 x float> %r336}337 338define i64 @sub_constant_to_shift_to_add(i32 %x, i64 %s1, i64 %s2) {339; CHECK-LABEL: sub_constant_to_shift_to_add:340; CHECK: # %bb.0:341; CHECK-NEXT: movq %rsi, %rax342; CHECK-NEXT: addl %edi, %edi343; CHECK-NEXT: cmpl $42, %edi344; CHECK-NEXT: cmovneq %rdx, %rax345; CHECK-NEXT: retq346 %sub = sub i32 42, %x347 %cmp = icmp eq i32 %sub, %x348 %r = select i1 %cmp, i64 %s1, i64 %s2349 ret i64 %r350}351 352define float @olt(float %x) {353; CHECK-LABEL: olt:354; CHECK: # %bb.0:355; CHECK-NEXT: movaps {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]356; CHECK-NEXT: xorps %xmm0, %xmm1357; CHECK-NEXT: minss %xmm1, %xmm0358; CHECK-NEXT: retq359 %cmp = fcmp olt float %x, 0.0360 %neg = fneg float %x361 %r = select i1 %cmp, float %x, float %neg362 ret float %r363}364 365define double @ogt(double %x) {366; CHECK-LABEL: ogt:367; CHECK: # %bb.0:368; CHECK-NEXT: movapd {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0]369; CHECK-NEXT: xorpd %xmm0, %xmm1370; CHECK-NEXT: maxsd %xmm1, %xmm0371; CHECK-NEXT: retq372 %neg = fneg double %x373 %cmp = fcmp ogt double %x, 0.0374 %r = select i1 %cmp, double %x, double %neg375 ret double %r376}377 378define <4 x float> @olt_swap(<4 x float> %x) {379; CHECK-LABEL: olt_swap:380; CHECK: # %bb.0:381; CHECK-NEXT: movaps {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]382; CHECK-NEXT: xorps %xmm0, %xmm1383; CHECK-NEXT: maxps %xmm0, %xmm1384; CHECK-NEXT: movaps %xmm1, %xmm0385; CHECK-NEXT: retq386 %cmp = fcmp olt <4 x float> %x, zeroinitializer387 %neg = fneg <4 x float> %x388 %r = select <4 x i1> %cmp, <4 x float> %neg, <4 x float> %x389 ret <4 x float> %r390}391 392define <2 x double> @ogt_swap(<2 x double> %x) {393; CHECK-LABEL: ogt_swap:394; CHECK: # %bb.0:395; CHECK-NEXT: movapd {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0]396; CHECK-NEXT: xorpd %xmm0, %xmm1397; CHECK-NEXT: minpd %xmm0, %xmm1398; CHECK-NEXT: movapd %xmm1, %xmm0399; CHECK-NEXT: retq400 %neg = fneg <2 x double> %x401 %cmp = fcmp ogt <2 x double> %x, zeroinitializer402 %r = select <2 x i1> %cmp, <2 x double> %neg, <2 x double> %x403 ret <2 x double> %r404}405 406define <4 x float> @ole(<4 x float> %x) {407; SSE2-LABEL: ole:408; SSE2: # %bb.0:409; SSE2-NEXT: movaps {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]410; SSE2-NEXT: xorps %xmm0, %xmm2411; SSE2-NEXT: movaps %xmm0, %xmm1412; SSE2-NEXT: cmpleps %xmm2, %xmm1413; SSE2-NEXT: andps %xmm1, %xmm2414; SSE2-NEXT: andnps %xmm0, %xmm1415; SSE2-NEXT: orps %xmm2, %xmm1416; SSE2-NEXT: movaps %xmm1, %xmm0417; SSE2-NEXT: retq418;419; SSE41-LABEL: ole:420; SSE41: # %bb.0:421; SSE41-NEXT: movaps %xmm0, %xmm1422; SSE41-NEXT: movaps {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]423; SSE41-NEXT: xorps %xmm0, %xmm2424; SSE41-NEXT: cmpleps %xmm2, %xmm0425; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm1426; SSE41-NEXT: movaps %xmm1, %xmm0427; SSE41-NEXT: retq428 %cmp = fcmp ole <4 x float> %x, zeroinitializer429 %neg = fneg <4 x float> %x430 %r = select <4 x i1> %cmp, <4 x float> %neg, <4 x float> %x431 ret <4 x float> %r432}433 434define <2 x double> @oge(<2 x double> %x) {435; SSE2-LABEL: oge:436; SSE2: # %bb.0:437; SSE2-NEXT: movapd {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0]438; SSE2-NEXT: xorpd %xmm0, %xmm2439; SSE2-NEXT: movapd %xmm2, %xmm1440; SSE2-NEXT: cmplepd %xmm0, %xmm1441; SSE2-NEXT: andpd %xmm1, %xmm2442; SSE2-NEXT: andnpd %xmm0, %xmm1443; SSE2-NEXT: orpd %xmm2, %xmm1444; SSE2-NEXT: movapd %xmm1, %xmm0445; SSE2-NEXT: retq446;447; SSE41-LABEL: oge:448; SSE41: # %bb.0:449; SSE41-NEXT: movapd %xmm0, %xmm1450; SSE41-NEXT: movapd {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0]451; SSE41-NEXT: xorpd %xmm0, %xmm2452; SSE41-NEXT: movapd %xmm2, %xmm0453; SSE41-NEXT: cmplepd %xmm1, %xmm0454; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1455; SSE41-NEXT: movapd %xmm1, %xmm0456; SSE41-NEXT: retq457 %neg = fneg <2 x double> %x458 %cmp = fcmp oge <2 x double> %x, zeroinitializer459 %r = select <2 x i1> %cmp, <2 x double> %neg, <2 x double> %x460 ret <2 x double> %r461}462 463; negative test - don't create an fneg to replace 0.0 operand464 465define double @ogt_no_fneg(double %x, double %y) {466; SSE2-LABEL: ogt_no_fneg:467; SSE2: # %bb.0:468; SSE2-NEXT: xorpd %xmm2, %xmm2469; SSE2-NEXT: cmpltsd %xmm0, %xmm2470; SSE2-NEXT: andpd %xmm2, %xmm0471; SSE2-NEXT: andnpd %xmm1, %xmm2472; SSE2-NEXT: orpd %xmm2, %xmm0473; SSE2-NEXT: retq474;475; SSE41-LABEL: ogt_no_fneg:476; SSE41: # %bb.0:477; SSE41-NEXT: movapd %xmm0, %xmm2478; SSE41-NEXT: xorpd %xmm0, %xmm0479; SSE41-NEXT: cmpltsd %xmm2, %xmm0480; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1481; SSE41-NEXT: movapd %xmm1, %xmm0482; SSE41-NEXT: retq483 %cmp = fcmp ogt double %x, 0.0484 %r = select i1 %cmp, double %x, double %y485 ret double %r486}487 488; negative test - can't change the setcc for non-zero constant489 490define double @ogt_no_zero(double %x) {491; SSE2-LABEL: ogt_no_zero:492; SSE2: # %bb.0:493; SSE2-NEXT: movapd {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0]494; SSE2-NEXT: xorpd %xmm0, %xmm1495; SSE2-NEXT: movsd {{.*#+}} xmm2 = [1.0E+0,0.0E+0]496; SSE2-NEXT: cmpltsd %xmm0, %xmm2497; SSE2-NEXT: andpd %xmm2, %xmm0498; SSE2-NEXT: andnpd %xmm1, %xmm2499; SSE2-NEXT: orpd %xmm2, %xmm0500; SSE2-NEXT: retq501;502; SSE41-LABEL: ogt_no_zero:503; SSE41: # %bb.0:504; SSE41-NEXT: movapd %xmm0, %xmm1505; SSE41-NEXT: movapd {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0]506; SSE41-NEXT: xorpd %xmm0, %xmm2507; SSE41-NEXT: movsd {{.*#+}} xmm0 = [1.0E+0,0.0E+0]508; SSE41-NEXT: cmpltsd %xmm1, %xmm0509; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm2510; SSE41-NEXT: movapd %xmm2, %xmm0511; SSE41-NEXT: retq512 %neg = fneg double %x513 %cmp = fcmp ogt double %x, 1.0514 %r = select i1 %cmp, double %x, double %neg515 ret double %r516}517 518define i64 @cmp_sgt_not(i64 %a, i64 %b) {519; CHECK-LABEL: cmp_sgt_not:520; CHECK: # %bb.0:521; CHECK-NEXT: xorl %eax, %eax522; CHECK-NEXT: cmpq %rdi, %rsi523; CHECK-NEXT: setg %al524; CHECK-NEXT: negq %rax525; CHECK-NEXT: retq526 %na = xor i64 %a, -1527 %nb = xor i64 %b, -1528 %c = icmp sgt i64 %na, %nb529 %r = sext i1 %c to i64530 ret i64 %r531}532 533define i64 @cmp_sgt_not_with_constant(i64 %a) {534; CHECK-LABEL: cmp_sgt_not_with_constant:535; CHECK: # %bb.0:536; CHECK-NEXT: xorl %eax, %eax537; CHECK-NEXT: cmpq $-43, %rdi538; CHECK-NEXT: setl %al539; CHECK-NEXT: negq %rax540; CHECK-NEXT: retq541 %na = xor i64 %a, -1542 %c = icmp sgt i64 %na, 42543 %r = sext i1 %c to i64544 ret i64 %r545}546 547define <4 x i32> @cmp_sgt_not_with_vec(<4 x i32> %a, <4 x i32> %b) {548; CHECK-LABEL: cmp_sgt_not_with_vec:549; CHECK: # %bb.0:550; CHECK-NEXT: pcmpgtd %xmm0, %xmm1551; CHECK-NEXT: movdqa %xmm1, %xmm0552; CHECK-NEXT: retq553 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>554 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>555 %c = icmp sgt <4 x i32> %na, %nb556 %r = sext <4 x i1> %c to <4 x i32>557 ret <4 x i32> %r558}559 560define i64 @cmp_ugt_not(i64 %a, i64 %b) {561; CHECK-LABEL: cmp_ugt_not:562; CHECK: # %bb.0:563; CHECK-NEXT: notq %rdi564; CHECK-NEXT: xorl %eax, %eax565; CHECK-NEXT: addq %rsi, %rdi566; CHECK-NEXT: sbbq %rax, %rax567; CHECK-NEXT: retq568 %na = xor i64 %a, -1569 %nb = xor i64 %b, -1570 %c = icmp ugt i64 %na, %nb571 %r = sext i1 %c to i64572 ret i64 %r573}574 575define i64 @cmp_ugt_not_with_constant(i64 %a) {576; CHECK-LABEL: cmp_ugt_not_with_constant:577; CHECK: # %bb.0:578; CHECK-NEXT: xorl %eax, %eax579; CHECK-NEXT: cmpq $-43, %rdi580; CHECK-NEXT: sbbq %rax, %rax581; CHECK-NEXT: retq582 %na = xor i64 %a, -1583 %c = icmp ugt i64 %na, 42584 %r = sext i1 %c to i64585 ret i64 %r586}587 588define <4 x i32> @cmp_ugt_not_with_vec(<4 x i32> %a, <4 x i32> %b) {589; SSE2-LABEL: cmp_ugt_not_with_vec:590; SSE2: # %bb.0:591; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]592; SSE2-NEXT: pxor %xmm2, %xmm0593; SSE2-NEXT: pxor %xmm1, %xmm2594; SSE2-NEXT: pcmpgtd %xmm0, %xmm2595; SSE2-NEXT: movdqa %xmm2, %xmm0596; SSE2-NEXT: retq597;598; SSE41-LABEL: cmp_ugt_not_with_vec:599; SSE41: # %bb.0:600; SSE41-NEXT: pminud %xmm1, %xmm0601; SSE41-NEXT: pcmpeqd %xmm1, %xmm0602; SSE41-NEXT: pcmpeqd %xmm1, %xmm1603; SSE41-NEXT: pxor %xmm1, %xmm0604; SSE41-NEXT: retq605 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>606 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>607 %c = icmp ugt <4 x i32> %na, %nb608 %r = sext <4 x i1> %c to <4 x i32>609 ret <4 x i32> %r610}611 612define i64 @cmp_sge_not(i64 %a, i64 %b) {613; CHECK-LABEL: cmp_sge_not:614; CHECK: # %bb.0:615; CHECK-NEXT: xorl %eax, %eax616; CHECK-NEXT: cmpq %rdi, %rsi617; CHECK-NEXT: setge %al618; CHECK-NEXT: negq %rax619; CHECK-NEXT: retq620 %na = xor i64 %a, -1621 %nb = xor i64 %b, -1622 %c = icmp sge i64 %na, %nb623 %r = sext i1 %c to i64624 ret i64 %r625}626 627define i64 @cmp_sge_not_with_constant(i64 %a) {628; CHECK-LABEL: cmp_sge_not_with_constant:629; CHECK: # %bb.0:630; CHECK-NEXT: xorl %eax, %eax631; CHECK-NEXT: cmpq $-42, %rdi632; CHECK-NEXT: setl %al633; CHECK-NEXT: negq %rax634; CHECK-NEXT: retq635 %na = xor i64 %a, -1636 %c = icmp sge i64 %na, 42637 %r = sext i1 %c to i64638 ret i64 %r639}640 641define <4 x i32> @cmp_sge_not_with_vec(<4 x i32> %a, <4 x i32> %b) {642; SSE2-LABEL: cmp_sge_not_with_vec:643; SSE2: # %bb.0:644; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]645; SSE2-NEXT: pxor %xmm2, %xmm1646; SSE2-NEXT: pxor %xmm2, %xmm0647; SSE2-NEXT: pcmpgtd %xmm1, %xmm0648; SSE2-NEXT: pcmpeqd %xmm1, %xmm1649; SSE2-NEXT: pxor %xmm1, %xmm0650; SSE2-NEXT: retq651;652; SSE41-LABEL: cmp_sge_not_with_vec:653; SSE41: # %bb.0:654; SSE41-NEXT: pmaxud %xmm1, %xmm0655; SSE41-NEXT: pcmpeqd %xmm1, %xmm0656; SSE41-NEXT: retq657 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>658 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>659 %c = icmp uge <4 x i32> %na, %nb660 %r = sext <4 x i1> %c to <4 x i32>661 ret <4 x i32> %r662}663 664define i64 @cmp_uge_not(i64 %a, i64 %b) {665; CHECK-LABEL: cmp_uge_not:666; CHECK: # %bb.0:667; CHECK-NEXT: xorl %eax, %eax668; CHECK-NEXT: cmpq %rdi, %rsi669; CHECK-NEXT: adcq $-1, %rax670; CHECK-NEXT: retq671 %na = xor i64 %a, -1672 %nb = xor i64 %b, -1673 %c = icmp uge i64 %na, %nb674 %r = sext i1 %c to i64675 ret i64 %r676}677 678define i64 @cmp_uge_not_with_constant(i64 %a) {679; CHECK-LABEL: cmp_uge_not_with_constant:680; CHECK: # %bb.0:681; CHECK-NEXT: xorl %eax, %eax682; CHECK-NEXT: cmpq $-42, %rdi683; CHECK-NEXT: sbbq %rax, %rax684; CHECK-NEXT: retq685 %na = xor i64 %a, -1686 %c = icmp uge i64 %na, 42687 %r = sext i1 %c to i64688 ret i64 %r689}690 691define <4 x i32> @cmp_uge_not_with_vec(<4 x i32> %a, <4 x i32> %b) {692; SSE2-LABEL: cmp_uge_not_with_vec:693; SSE2: # %bb.0:694; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]695; SSE2-NEXT: pxor %xmm2, %xmm1696; SSE2-NEXT: pxor %xmm2, %xmm0697; SSE2-NEXT: pcmpgtd %xmm1, %xmm0698; SSE2-NEXT: pcmpeqd %xmm1, %xmm1699; SSE2-NEXT: pxor %xmm1, %xmm0700; SSE2-NEXT: retq701;702; SSE41-LABEL: cmp_uge_not_with_vec:703; SSE41: # %bb.0:704; SSE41-NEXT: pmaxud %xmm1, %xmm0705; SSE41-NEXT: pcmpeqd %xmm1, %xmm0706; SSE41-NEXT: retq707 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>708 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>709 %c = icmp uge <4 x i32> %na, %nb710 %r = sext <4 x i1> %c to <4 x i32>711 ret <4 x i32> %r712}713 714define i64 @cmp_sle_not(i64 %a, i64 %b) {715; CHECK-LABEL: cmp_sle_not:716; CHECK: # %bb.0:717; CHECK-NEXT: xorl %eax, %eax718; CHECK-NEXT: cmpq %rdi, %rsi719; CHECK-NEXT: setle %al720; CHECK-NEXT: negq %rax721; CHECK-NEXT: retq722 %na = xor i64 %a, -1723 %nb = xor i64 %b, -1724 %c = icmp sle i64 %na, %nb725 %r = sext i1 %c to i64726 ret i64 %r727}728 729define i64 @cmp_sle_not_with_constant(i64 %a) {730; CHECK-LABEL: cmp_sle_not_with_constant:731; CHECK: # %bb.0:732; CHECK-NEXT: xorl %eax, %eax733; CHECK-NEXT: cmpq $-43, %rdi734; CHECK-NEXT: setge %al735; CHECK-NEXT: negq %rax736; CHECK-NEXT: retq737 %na = xor i64 %a, -1738 %c = icmp sle i64 %na, 42739 %r = sext i1 %c to i64740 ret i64 %r741}742 743define <4 x i32> @cmp_sle_not_with_vec(<4 x i32> %a, <4 x i32> %b) {744; CHECK-LABEL: cmp_sle_not_with_vec:745; CHECK: # %bb.0:746; CHECK-NEXT: pcmpgtd %xmm0, %xmm1747; CHECK-NEXT: pcmpeqd %xmm0, %xmm0748; CHECK-NEXT: pxor %xmm1, %xmm0749; CHECK-NEXT: retq750 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>751 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>752 %c = icmp sle <4 x i32> %na, %nb753 %r = sext <4 x i1> %c to <4 x i32>754 ret <4 x i32> %r755}756 757define i64 @cmp_slt_not(i64 %a, i64 %b) {758; CHECK-LABEL: cmp_slt_not:759; CHECK: # %bb.0:760; CHECK-NEXT: xorl %eax, %eax761; CHECK-NEXT: cmpq %rdi, %rsi762; CHECK-NEXT: setl %al763; CHECK-NEXT: negq %rax764; CHECK-NEXT: retq765 %na = xor i64 %a, -1766 %nb = xor i64 %b, -1767 %c = icmp slt i64 %na, %nb768 %r = sext i1 %c to i64769 ret i64 %r770}771 772define i64 @cmp_slt_not_with_constant(i64 %a) {773; CHECK-LABEL: cmp_slt_not_with_constant:774; CHECK: # %bb.0:775; CHECK-NEXT: xorl %eax, %eax776; CHECK-NEXT: cmpq $-42, %rdi777; CHECK-NEXT: setge %al778; CHECK-NEXT: negq %rax779; CHECK-NEXT: retq780 %na = xor i64 %a, -1781 %c = icmp slt i64 %na, 42782 %r = sext i1 %c to i64783 ret i64 %r784}785 786define <4 x i32> @cmp_slt_not_with_vec(<4 x i32> %a, <4 x i32> %b) {787; CHECK-LABEL: cmp_slt_not_with_vec:788; CHECK: # %bb.0:789; CHECK-NEXT: pcmpgtd %xmm1, %xmm0790; CHECK-NEXT: retq791 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>792 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>793 %c = icmp slt <4 x i32> %na, %nb794 %r = sext <4 x i1> %c to <4 x i32>795 ret <4 x i32> %r796}797 798 799define i64 @cmp_ult_not(i64 %a, i64 %b) {800; CHECK-LABEL: cmp_ult_not:801; CHECK: # %bb.0:802; CHECK-NEXT: notq %rsi803; CHECK-NEXT: xorl %eax, %eax804; CHECK-NEXT: addq %rdi, %rsi805; CHECK-NEXT: sbbq %rax, %rax806; CHECK-NEXT: retq807 %na = xor i64 %a, -1808 %nb = xor i64 %b, -1809 %c = icmp ult i64 %na, %nb810 %r = sext i1 %c to i64811 ret i64 %r812}813 814define i64 @cmp_ult_not_with_constant(i64 %a) {815; CHECK-LABEL: cmp_ult_not_with_constant:816; CHECK: # %bb.0:817; CHECK-NEXT: xorl %eax, %eax818; CHECK-NEXT: addq $42, %rdi819; CHECK-NEXT: sbbq %rax, %rax820; CHECK-NEXT: retq821 %na = xor i64 %a, -1822 %c = icmp ult i64 %na, 42823 %r = sext i1 %c to i64824 ret i64 %r825}826 827define <4 x i32> @cmp_ult_not_with_vec(<4 x i32> %a, <4 x i32> %b) {828; SSE2-LABEL: cmp_ult_not_with_vec:829; SSE2: # %bb.0:830; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]831; SSE2-NEXT: pxor %xmm2, %xmm1832; SSE2-NEXT: pxor %xmm2, %xmm0833; SSE2-NEXT: pcmpgtd %xmm1, %xmm0834; SSE2-NEXT: retq835;836; SSE41-LABEL: cmp_ult_not_with_vec:837; SSE41: # %bb.0:838; SSE41-NEXT: pmaxud %xmm1, %xmm0839; SSE41-NEXT: pcmpeqd %xmm1, %xmm0840; SSE41-NEXT: pcmpeqd %xmm1, %xmm1841; SSE41-NEXT: pxor %xmm1, %xmm0842; SSE41-NEXT: retq843 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>844 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>845 %c = icmp ult <4 x i32> %na, %nb846 %r = sext <4 x i1> %c to <4 x i32>847 ret <4 x i32> %r848}849 850define i64 @cmp_ule_not(i64 %a, i64 %b) {851; CHECK-LABEL: cmp_ule_not:852; CHECK: # %bb.0:853; CHECK-NEXT: xorl %eax, %eax854; CHECK-NEXT: cmpq %rsi, %rdi855; CHECK-NEXT: adcq $-1, %rax856; CHECK-NEXT: retq857 %na = xor i64 %a, -1858 %nb = xor i64 %b, -1859 %c = icmp ule i64 %na, %nb860 %r = sext i1 %c to i64861 ret i64 %r862}863 864define i64 @cmp_ule_not_with_constant(i64 %a) {865; CHECK-LABEL: cmp_ule_not_with_constant:866; CHECK: # %bb.0:867; CHECK-NEXT: xorl %eax, %eax868; CHECK-NEXT: cmpq $-43, %rdi869; CHECK-NEXT: adcq $-1, %rax870; CHECK-NEXT: retq871 %na = xor i64 %a, -1872 %c = icmp ule i64 %na, 42873 %r = sext i1 %c to i64874 ret i64 %r875}876 877define <4 x i32> @cmp_ule_not_with_vec(<4 x i32> %a, <4 x i32> %b) {878; SSE2-LABEL: cmp_ule_not_with_vec:879; SSE2: # %bb.0:880; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]881; SSE2-NEXT: pxor %xmm2, %xmm0882; SSE2-NEXT: pxor %xmm1, %xmm2883; SSE2-NEXT: pcmpgtd %xmm0, %xmm2884; SSE2-NEXT: pcmpeqd %xmm0, %xmm0885; SSE2-NEXT: pxor %xmm2, %xmm0886; SSE2-NEXT: retq887;888; SSE41-LABEL: cmp_ule_not_with_vec:889; SSE41: # %bb.0:890; SSE41-NEXT: pminud %xmm1, %xmm0891; SSE41-NEXT: pcmpeqd %xmm1, %xmm0892; SSE41-NEXT: retq893 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>894 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>895 %c = icmp ule <4 x i32> %na, %nb896 %r = sext <4 x i1> %c to <4 x i32>897 ret <4 x i32> %r898}899 900define i64 @cmp_eq_not(i64 %a, i64 %b) {901; CHECK-LABEL: cmp_eq_not:902; CHECK: # %bb.0:903; CHECK-NEXT: xorl %eax, %eax904; CHECK-NEXT: cmpq %rsi, %rdi905; CHECK-NEXT: sete %al906; CHECK-NEXT: negq %rax907; CHECK-NEXT: retq908 %na = xor i64 %a, -1909 %nb = xor i64 %b, -1910 %c = icmp eq i64 %na, %nb911 %r = sext i1 %c to i64912 ret i64 %r913}914 915define i64 @cmp_eq_not_with_constant(i64 %a) {916; CHECK-LABEL: cmp_eq_not_with_constant:917; CHECK: # %bb.0:918; CHECK-NEXT: xorl %eax, %eax919; CHECK-NEXT: cmpq $-43, %rdi920; CHECK-NEXT: sete %al921; CHECK-NEXT: negq %rax922; CHECK-NEXT: retq923 %na = xor i64 %a, -1924 %c = icmp eq i64 %na, 42925 %r = sext i1 %c to i64926 ret i64 %r927}928 929define <4 x i32> @cmp_eq_not_with_vec(<4 x i32> %a, <4 x i32> %b) {930; CHECK-LABEL: cmp_eq_not_with_vec:931; CHECK: # %bb.0:932; CHECK-NEXT: pcmpeqd %xmm1, %xmm0933; CHECK-NEXT: retq934 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>935 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>936 %c = icmp eq <4 x i32> %na, %nb937 %r = sext <4 x i1> %c to <4 x i32>938 ret <4 x i32> %r939}940define i64 @cmp_ne_not(i64 %a, i64 %b) {941; CHECK-LABEL: cmp_ne_not:942; CHECK: # %bb.0:943; CHECK-NEXT: xorl %eax, %eax944; CHECK-NEXT: cmpq %rsi, %rdi945; CHECK-NEXT: setne %al946; CHECK-NEXT: negq %rax947; CHECK-NEXT: retq948 %na = xor i64 %a, -1949 %nb = xor i64 %b, -1950 %c = icmp ne i64 %na, %nb951 %r = sext i1 %c to i64952 ret i64 %r953}954 955define i64 @cmp_ne_not_with_constant(i64 %a) {956; CHECK-LABEL: cmp_ne_not_with_constant:957; CHECK: # %bb.0:958; CHECK-NEXT: xorl %eax, %eax959; CHECK-NEXT: cmpq $-43, %rdi960; CHECK-NEXT: setne %al961; CHECK-NEXT: negq %rax962; CHECK-NEXT: retq963 %na = xor i64 %a, -1964 %c = icmp ne i64 %na, 42965 %r = sext i1 %c to i64966 ret i64 %r967}968 969define <4 x i32> @cmp_ne_not_with_vec(<4 x i32> %a, <4 x i32> %b) {970; CHECK-LABEL: cmp_ne_not_with_vec:971; CHECK: # %bb.0:972; CHECK-NEXT: pcmpeqd %xmm1, %xmm0973; CHECK-NEXT: pcmpeqd %xmm1, %xmm1974; CHECK-NEXT: pxor %xmm1, %xmm0975; CHECK-NEXT: retq976 %na = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>977 %nb = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>978 %c = icmp ne <4 x i32> %na, %nb979 %r = sext <4 x i1> %c to <4 x i32>980 ret <4 x i32> %r981}982 983define i64 @cmp_uge_not_commute(i64 %b, i64 %a) {984; CHECK-LABEL: cmp_uge_not_commute:985; CHECK: # %bb.0:986; CHECK-NEXT: xorl %eax, %eax987; CHECK-NEXT: cmpq %rsi, %rdi988; CHECK-NEXT: adcq $-1, %rax989; CHECK-NEXT: retq990 %na = xor i64 %a, -1991 %nb = xor i64 %b, -1992 %c = icmp uge i64 %na, %nb993 %r = sext i1 %c to i64994 ret i64 %r995}996 997define i64 @cmp_ult_not_with_constant_commute(i64 %a) {998; CHECK-LABEL: cmp_ult_not_with_constant_commute:999; CHECK: # %bb.0:1000; CHECK-NEXT: xorl %eax, %eax1001; CHECK-NEXT: cmpq $43, %rdi1002; CHECK-NEXT: adcq $-1, %rax1003; CHECK-NEXT: retq1004 %na = xor i64 %a, -11005 %c = icmp ult i64 42, %a1006 %r = sext i1 %c to i641007 ret i64 %r1008}1009 1010define <2 x i64> @cmp_uge_not_with_vec2xi64(<2 x i64> %a, <2 x i64> %b) {1011; CHECK-LABEL: cmp_uge_not_with_vec2xi64:1012; CHECK: # %bb.0:1013; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]1014; CHECK-NEXT: pxor %xmm2, %xmm11015; CHECK-NEXT: pxor %xmm2, %xmm01016; CHECK-NEXT: movdqa %xmm0, %xmm21017; CHECK-NEXT: pcmpgtd %xmm1, %xmm21018; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]1019; CHECK-NEXT: pcmpeqd %xmm1, %xmm01020; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]1021; CHECK-NEXT: pand %xmm3, %xmm01022; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]1023; CHECK-NEXT: por %xmm0, %xmm11024; CHECK-NEXT: pcmpeqd %xmm0, %xmm01025; CHECK-NEXT: pxor %xmm1, %xmm01026; CHECK-NEXT: retq1027 %na = xor <2 x i64> %a, <i64 -1, i64 -1>1028 %nb = xor <2 x i64> %b, <i64 -1, i64 -1>1029 %c = icmp uge <2 x i64> %na, %nb1030 %r = sext <2 x i1> %c to <2 x i64>1031 ret <2 x i64> %r1032}1033