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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sha512 | FileCheck %s3; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sha512 | FileCheck %s4 5define <4 x i64> @test_int_x86_vsha512msg1(<4 x i64> %A, <2 x i64> %B) {6; CHECK-LABEL: test_int_x86_vsha512msg1:7; CHECK: # %bb.0:8; CHECK-NEXT: vsha512msg1 %xmm1, %ymm0 # encoding: [0xc4,0xe2,0x7f,0xcc,0xc1]9; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]10 %ret = call <4 x i64> @llvm.x86.vsha512msg1(<4 x i64> %A, <2 x i64> %B)11 ret <4 x i64> %ret12}13declare <4 x i64> @llvm.x86.vsha512msg1(<4 x i64> %A, <2 x i64> %B)14 15define <4 x i64> @test_int_x86_vsha512msg2(<4 x i64> %A, <4 x i64> %B) {16; CHECK-LABEL: test_int_x86_vsha512msg2:17; CHECK: # %bb.0:18; CHECK-NEXT: vsha512msg2 %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x7f,0xcd,0xc1]19; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]20 %ret = call <4 x i64> @llvm.x86.vsha512msg2(<4 x i64> %A, <4 x i64> %B)21 ret <4 x i64> %ret22}23declare <4 x i64> @llvm.x86.vsha512msg2(<4 x i64> %A, <4 x i64> %B)24 25define <4 x i64> @test_int_x86_vsha512rnds2(<4 x i64> %A, <4 x i64> %B, <2 x i64> %C) {26; CHECK-LABEL: test_int_x86_vsha512rnds2:27; CHECK: # %bb.0:28; CHECK-NEXT: vsha512rnds2 %xmm2, %ymm1, %ymm0 # encoding: [0xc4,0xe2,0x77,0xcb,0xc2]29; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]30 %ret = call <4 x i64> @llvm.x86.vsha512rnds2(<4 x i64> %A, <4 x i64> %B, <2 x i64> %C)31 ret <4 x i64> %ret32}33declare <4 x i64> @llvm.x86.vsha512rnds2(<4 x i64> %A, <4 x i64> %B, <2 x i64> %C)34