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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s3 4define i8 @shl_and(i8 %x, i8 %y) nounwind {5; CHECK-LABEL: shl_and:6; CHECK: # %bb.0:7; CHECK-NEXT: # kill: def $esi killed $esi def $rsi8; CHECK-NEXT: leal (,%rsi,4), %eax9; CHECK-NEXT: shlb $5, %dil10; CHECK-NEXT: andb %dil, %al11; CHECK-NEXT: # kill: def $al killed $al killed $eax12; CHECK-NEXT: retq13 %sh0 = shl i8 %x, 314 %r = and i8 %sh0, %y15 %sh1 = shl i8 %r, 216 ret i8 %sh117}18 19define i16 @shl_or(i16 %x, i16 %y) nounwind {20; CHECK-LABEL: shl_or:21; CHECK: # %bb.0:22; CHECK-NEXT: movl %edi, %eax23; CHECK-NEXT: shll $7, %esi24; CHECK-NEXT: shll $12, %eax25; CHECK-NEXT: orl %esi, %eax26; CHECK-NEXT: # kill: def $ax killed $ax killed $eax27; CHECK-NEXT: retq28 %sh0 = shl i16 %x, 529 %r = or i16 %y, %sh030 %sh1 = shl i16 %r, 731 ret i16 %sh132}33 34define i32 @shl_xor(i32 %x, i32 %y) nounwind {35; CHECK-LABEL: shl_xor:36; CHECK: # %bb.0:37; CHECK-NEXT: movl %edi, %eax38; CHECK-NEXT: shll $7, %esi39; CHECK-NEXT: shll $12, %eax40; CHECK-NEXT: xorl %esi, %eax41; CHECK-NEXT: retq42 %sh0 = shl i32 %x, 543 %r = xor i32 %sh0, %y44 %sh1 = shl i32 %r, 745 ret i32 %sh146}47 48define i64 @lshr_and(i64 %x, i64 %y) nounwind {49; CHECK-LABEL: lshr_and:50; CHECK: # %bb.0:51; CHECK-NEXT: movq %rdi, %rax52; CHECK-NEXT: shrq $7, %rsi53; CHECK-NEXT: shrq $12, %rax54; CHECK-NEXT: andq %rsi, %rax55; CHECK-NEXT: retq56 %sh0 = lshr i64 %x, 557 %r = and i64 %y, %sh058 %sh1 = lshr i64 %r, 759 ret i64 %sh160}61 62define <4 x i32> @lshr_or(<4 x i32> %x, <4 x i32> %y) nounwind {63; CHECK-LABEL: lshr_or:64; CHECK: # %bb.0:65; CHECK-NEXT: psrld $7, %xmm166; CHECK-NEXT: psrld $12, %xmm067; CHECK-NEXT: por %xmm1, %xmm068; CHECK-NEXT: retq69 %sh0 = lshr <4 x i32> %x, <i32 5, i32 5, i32 5, i32 5>70 %r = or <4 x i32> %sh0, %y71 %sh1 = lshr <4 x i32> %r, <i32 7, i32 7, i32 7, i32 7>72 ret <4 x i32> %sh173}74 75define <8 x i16> @lshr_xor(<8 x i16> %x, <8 x i16> %y) nounwind {76; CHECK-LABEL: lshr_xor:77; CHECK: # %bb.0:78; CHECK-NEXT: psrlw $7, %xmm179; CHECK-NEXT: psrlw $12, %xmm080; CHECK-NEXT: pxor %xmm1, %xmm081; CHECK-NEXT: retq82 %sh0 = lshr <8 x i16> %x, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>83 %r = xor <8 x i16> %y, %sh084 %sh1 = lshr <8 x i16> %r, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>85 ret <8 x i16> %sh186}87 88 89define <16 x i8> @ashr_and(<16 x i8> %x, <16 x i8> %y) nounwind {90; CHECK-LABEL: ashr_and:91; CHECK: # %bb.0:92; CHECK-NEXT: psrlw $2, %xmm193; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm194; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]95; CHECK-NEXT: pxor %xmm2, %xmm196; CHECK-NEXT: psubb %xmm2, %xmm197; CHECK-NEXT: psrlw $5, %xmm098; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm099; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]100; CHECK-NEXT: pxor %xmm2, %xmm0101; CHECK-NEXT: psubb %xmm2, %xmm0102; CHECK-NEXT: pand %xmm1, %xmm0103; CHECK-NEXT: retq104 %sh0 = ashr <16 x i8> %x, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>105 %r = and <16 x i8> %y, %sh0106 %sh1 = ashr <16 x i8> %r, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>107 ret <16 x i8> %sh1108}109 110define <2 x i64> @ashr_or(<2 x i64> %x, <2 x i64> %y) nounwind {111; CHECK-LABEL: ashr_or:112; CHECK: # %bb.0:113; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]114; CHECK-NEXT: psrad $7, %xmm2115; CHECK-NEXT: psrlq $7, %xmm1116; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]117; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]118; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]119; CHECK-NEXT: psrad $12, %xmm2120; CHECK-NEXT: psrlq $12, %xmm0121; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]122; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]123; CHECK-NEXT: por %xmm1, %xmm0124; CHECK-NEXT: retq125 %sh0 = ashr <2 x i64> %x, <i64 5, i64 5>126 %r = or <2 x i64> %sh0, %y127 %sh1 = ashr <2 x i64> %r, <i64 7, i64 7>128 ret <2 x i64> %sh1129}130 131define i32 @ashr_xor(i32 %x, i32 %y) nounwind {132; CHECK-LABEL: ashr_xor:133; CHECK: # %bb.0:134; CHECK-NEXT: movl %edi, %eax135; CHECK-NEXT: sarl $7, %esi136; CHECK-NEXT: sarl $12, %eax137; CHECK-NEXT: xorl %esi, %eax138; CHECK-NEXT: retq139 %sh0 = ashr i32 %x, 5140 %r = xor i32 %y, %sh0141 %sh1 = ashr i32 %r, 7142 ret i32 %sh1143}144 145define i32 @shr_mismatch_xor(i32 %x, i32 %y) nounwind {146; CHECK-LABEL: shr_mismatch_xor:147; CHECK: # %bb.0:148; CHECK-NEXT: movl %edi, %eax149; CHECK-NEXT: sarl $5, %eax150; CHECK-NEXT: xorl %esi, %eax151; CHECK-NEXT: shrl $7, %eax152; CHECK-NEXT: retq153 %sh0 = ashr i32 %x, 5154 %r = xor i32 %y, %sh0155 %sh1 = lshr i32 %r, 7156 ret i32 %sh1157}158 159define i32 @ashr_overshift_xor(i32 %x, i32 %y) nounwind {160; CHECK-LABEL: ashr_overshift_xor:161; CHECK: # %bb.0:162; CHECK-NEXT: movl %edi, %eax163; CHECK-NEXT: sarl $15, %eax164; CHECK-NEXT: xorl %esi, %eax165; CHECK-NEXT: sarl $17, %eax166; CHECK-NEXT: retq167 %sh0 = ashr i32 %x, 15168 %r = xor i32 %y, %sh0169 %sh1 = ashr i32 %r, 17170 ret i32 %sh1171}172 173define i32 @lshr_or_extra_use(i32 %x, i32 %y, ptr %p) nounwind {174; CHECK-LABEL: lshr_or_extra_use:175; CHECK: # %bb.0:176; CHECK-NEXT: movl %edi, %eax177; CHECK-NEXT: shrl $5, %eax178; CHECK-NEXT: orl %esi, %eax179; CHECK-NEXT: movl %eax, (%rdx)180; CHECK-NEXT: shrl $7, %eax181; CHECK-NEXT: retq182 %sh0 = lshr i32 %x, 5183 %r = or i32 %sh0, %y184 store i32 %r, ptr %p185 %sh1 = lshr i32 %r, 7186 ret i32 %sh1187}188